[all-commits] [llvm/llvm-project] 76c8e1: [VectorCombine] Guard against the lane zero select...

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 76c8e1d8575fbeebdc0e18e0792e8f0a623834b3
      https://github.com/llvm/llvm-project/commit/76c8e1d8575fbeebdc0e18e0792e8f0a623834b3
  Author: David Green <david.green at arm.com>
  Date:   2024-06-28 (Fri, 28 Jun 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
    M llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll

  Log Message:
  -----------
  [VectorCombine] Guard against the lane zero select predicate being scalar

All but the first lane was being checked, but this could leave the first lane
with a scalar select predicate. This just extends the check to make sure the
types are all the same



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