[all-commits] [llvm/llvm-project] 544830: [RISCV] Rework zext.h handling for Zbkb again. (#9...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 544830a840ae70aa25465243cf1a3d301a9c2cf1
      https://github.com/llvm/llvm-project/commit/544830a840ae70aa25465243cf1a3d301a9c2cf1
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-06-27 (Thu, 27 Jun 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
    M llvm/test/MC/RISCV/rv32zbkb-only-valid.s
    M llvm/test/MC/RISCV/rv64zbkb-valid.s

  Log Message:
  -----------
  [RISCV] Rework zext.h handling for Zbkb again. (#96957)

Use the Zbb zext.h nstructions only when Zbb is enabled. In both the
assembler and codegen.
Use pack/packw for zext.h when Zbkb is enabled, but Zbb is not. This is
accomplished with extra isel patterns for CodeGen and InstAliases for
the assembler that are used with Zbkb and not Zbb.

This fixes the quirk that the assembler and disassembler printed
something different for pack rd, rs1, x0.



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