[all-commits] [llvm/llvm-project] 6c2f5d: [NVPTX] Don't use underlying alignment to align pa...

[Hugh Delaney via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6c2f5d6cdeee1a458700e33797fd8df263b748b9
      https://github.com/llvm/llvm-project/commit/6c2f5d6cdeee1a458700e33797fd8df263b748b9
  Author: Hugh Delaney <hugh.delaney at codeplay.com>
  Date:   2024-06-27 (Thu, 27 Jun 2024)

  Changed paths:
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
    M llvm/test/CodeGen/NVPTX/param-align.ll

  Log Message:
  -----------
  [NVPTX] Don't use underlying alignment to align param (#96793)

Previously, if a ptr had align N, then the NVPTX lowering was taking
this align N to refer to the alignment of the pointer type itself, as
opposed to the alignment of the memory that it points to.

As such, if a kernel with signature

```
define void @foo(ptr align 4 %_arg_ptr)
```

takes align 4 to be the alignment of the parameter, this would result in
breaking the ld.param into two separate loads like so:

```
	ld.param.u32 	%rd1, [foo_param_0+4];
	shl.b64 	%rd2, %rd1, 32;
	ld.param.u32 	%rd3, [foo_param_0];
	or.b64  	%rd4, %rd2, %rd3;
```

It isn't necessary as far as I can tell from the PTX ISA documents to
specify the alignment of params, nor to break the loading of params into
smaller loads based on their alignment. So this patch changes the
codegen to the better:

```
	ld.param.u64 	%rd1, [foo_param_0];
```



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