[all-commits] [llvm/llvm-project] edf578: [TableGen] Check for duplicate register tuple defi...

[Jason Eckhardt via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: edf5782f1780f480c3ae3fc0a44bf5432f9aa48b
      https://github.com/llvm/llvm-project/commit/edf5782f1780f480c3ae3fc0a44bf5432f9aa48b
  Author: Jason Eckhardt <jeckhardt at nvidia.com>
  Date:   2024-06-25 (Tue, 25 Jun 2024)

  Changed paths:
    A llvm/test/TableGen/check-duplicate-tuple-regs.td
    M llvm/utils/TableGen/Common/CodeGenRegisters.cpp

  Log Message:
  -----------
  [TableGen] Check for duplicate register tuple definitions. (#95725)

Currently TableGen does not directly detect duplicate synthesized
registers as can happen in this example:

def GPR128 : RegisterTuples<[sub0, sub1, sub2, sub3],
                            [(decimate (shl GPR32, 0), 1),
                             (decimate (shl GPR32, 1), 1),
                             (decimate (shl GPR32, 2), 1),
                             (decimate (shl GPR32, 3), 1)]>;

def GPR128_Aligned : RegisterTuples<[sub0, sub1, sub2, sub3],
                                    [(decimate (shl GPR32, 0), 4),
                                     (decimate (shl GPR32, 1), 4),
                                     (decimate (shl GPR32, 2), 4),
                                     (decimate (shl GPR32, 3), 4)]>;

TableGen does fail, but with an unrelated and difficult to understand
error that happens downstream of tuple expansion:
"error: No SubRegIndex for R0_R1_R2_R3 in R0_R1_R2_R3".

This patch detects the problem directly during expansion and emits an
error pointing the user to the actual issue:
"error: Register tuple redefines register 'R0_R1_R2_R3'".



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