[all-commits] [llvm/llvm-project] 5feb32: [AMDGPU] Extend readlane, writelane and readfirstl...

[Vikram Hegde via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5feb32ba929f9e517c530217cabb09d1d734a763
      https://github.com/llvm/llvm-project/commit/5feb32ba929f9e517c530217cabb09d1d734a763
  Author: Vikram Hegde <115221833+vikramRH at users.noreply.github.com>
  Date:   2024-06-25 (Tue, 25 Jun 2024)

  Changed paths:
    M clang/lib/CodeGen/CGBuiltin.cpp
    M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
    M llvm/docs/AMDGPUUsage.rst
    M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
    M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInstructions.td
    M llvm/lib/Target/AMDGPU/VOP1Instructions.td
    M llvm/lib/Target/AMDGPU/VOP2Instructions.td
    M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimization_split_dt_update.ll
    A llvm/test/CodeGen/AMDGPU/convergence-laneops.ll
    M llvm/test/CodeGen/AMDGPU/global-atomic-scan.ll
    M llvm/test/CodeGen/AMDGPU/global_atomic_optimizer_fp_rtn.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_iterative_scan.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_iterative_scan_fp.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_optimizer_fp_no_rtn.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ptr.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ptr.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ptr.ll
    M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll

  Log Message:
  -----------
  [AMDGPU] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (#89217)

This patch is intended to be the first of a series with end goal to
adapt atomic optimizer pass to support i64 and f64 operations (along
with removing all unnecessary bitcasts). This legalizes 64 bit readlane,
writelane and readfirstlane ops pre-ISel

---------

Co-authored-by: vikramRH <vikhegde at amd.com>



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