[all-commits] [llvm/llvm-project] 62baf2: [AArch64] Check for streaming mode in HasSME* feat...
Sander de Smalen via All-commits
all-commits at lists.llvm.org
Mon Jun 24 12:12:52 PDT 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 62baf21daa377c4ec1a641b26931063c1117d262
https://github.com/llvm/llvm-project/commit/62baf21daa377c4ec1a641b26931063c1117d262
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-06-24 (Mon, 24 Jun 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/test/CodeGen/AArch64/aarch64-sme2-asm.ll
M llvm/test/CodeGen/AArch64/sme-intrinsics-add.ll
M llvm/test/CodeGen/AArch64/sme-intrinsics-loads.ll
M llvm/test/CodeGen/AArch64/sme-intrinsics-mopa.ll
M llvm/test/CodeGen/AArch64/sme-intrinsics-mops.ll
M llvm/test/CodeGen/AArch64/sme-intrinsics-stores.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-add-sub-za16.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-add.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-cvt.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-cvtl.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-cvtn.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-extract-mova.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-fmlas.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-fmlas16.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-fp-dots.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-frint.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-insert-mova.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-int-dots.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-ld1.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-ldnt1.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-luti2-lane-x2.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-luti2-lane-x4.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-luti2-lane.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-luti4-lane-x2.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-luti4-lane-x4.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-luti4-lane.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-max.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-min.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-mlall.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-mlals.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-mop.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-mopa.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-qcvt.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-qcvtn.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-qrshr.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-rshl.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-select-sme-tileslice.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-sqdmulh.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-sub.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-vdot.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-zero-zt.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-zt0.ll
M llvm/test/CodeGen/AArch64/sme2p1-intrinsics-zero.ll
M llvm/test/CodeGen/AArch64/sve-callee-save-restore-pairs.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-contiguous-prefetches.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-conversion.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-counting-bits.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-counting-elems.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-fp-converts.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-ldN-sret-reg+imm-addr-mode.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-ldN-sret-reg+reg-addr-mode.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-logical.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-pred-creation.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-pred-operations.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-pred-testing.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-reinterpret.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-reversal.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-sel.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-sqdec.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-sqinc.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-st1-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-st1-addressing-mode-reg-reg.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-st1.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-stN-reg-imm-addr-mode.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-stN-reg-reg-addr-mode.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-stores.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-uqdec.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-uqinc.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-while.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-reshuffle.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-binary-narrowing-add-sub.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-binary-narrowing-shr.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-complex-dot.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-contiguous-conflict-detection.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-fp-converts.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-fp-int-binary-logarithm.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-fp-widening-mul-acc.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-int-mul-lane.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-non-widening-pairwise-arith.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-polynomial-arithmetic.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-psel.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-revd.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-unary-narrowing.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-uniform-complex-arith.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-while-reversed.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-while.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-widening-complex-int-arith.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-widening-dsp.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-widening-pairwise-arith.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-cntp.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-dots.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-fclamp.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-fp-reduce.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-int-reduce.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-loads.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-predicate-as-counter.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-sclamp.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-selx2.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-selx4.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-stores.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-uclamp.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-unpk.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-uzpx2.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-uzpx4.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-while-pn.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-zipx2.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-zipx4.ll
Log Message:
-----------
[AArch64] Check for streaming mode in HasSME* features. (#96302)
This also fixes up some asserts in copyPhysReg, loadRegFromStackSlot and
storeRegToStackSlot.
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