[all-commits] [llvm/llvm-project] 898814: Intrinsic: introduce minimumnum and maximumnum (#9...

YunQiang Su via All-commits all-commits at lists.llvm.org
Thu Jun 20 20:53:30 PDT 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 89881480030f48f83af668175b70a9798edca2fb
      https://github.com/llvm/llvm-project/commit/89881480030f48f83af668175b70a9798edca2fb
  Author: YunQiang Su <syq at debian.org>
  Date:   2024-06-21 (Fri, 21 Jun 2024)

  Changed paths:
    M llvm/docs/LangRef.rst
    M llvm/include/llvm/ADT/APFloat.h
    M llvm/include/llvm/Analysis/TargetLibraryInfo.def
    M llvm/include/llvm/CodeGen/BasicTTIImpl.h
    M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
    M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
    M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
    M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
    M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
    M llvm/include/llvm/CodeGen/ISDOpcodes.h
    M llvm/include/llvm/CodeGen/TargetLowering.h
    M llvm/include/llvm/IR/ConstrainedOps.def
    M llvm/include/llvm/IR/IRBuilder.h
    M llvm/include/llvm/IR/IntrinsicInst.h
    M llvm/include/llvm/IR/Intrinsics.td
    M llvm/include/llvm/IR/RuntimeLibcalls.def
    M llvm/include/llvm/IR/VPIntrinsics.def
    M llvm/include/llvm/Support/TargetOpcodes.def
    M llvm/include/llvm/Target/GenericOpcodes.td
    M llvm/include/llvm/Target/GlobalISel/Combine.td
    M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
    M llvm/include/llvm/Target/TargetSelectionDAG.td
    M llvm/lib/CodeGen/ExpandVectorPredication.cpp
    M llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp
    M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/CodeGen/GlobalISel/Utils.cpp
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/lib/CodeGen/TargetLoweringBase.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
    M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
    M llvm/lib/Target/Hexagon/HexagonPatterns.td
    M llvm/lib/Target/Hexagon/HexagonPatternsHVX.td
    M llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
    M llvm/test/CodeGen/AArch64/combine_andor_with_cmps.ll
    A llvm/test/CodeGen/AArch64/fp-maximumnum-minimumnum.ll
    M llvm/test/CodeGen/Hexagon/fminmax-v67.ll
    A llvm/test/CodeGen/LoongArch/fp-maximumnum-minimumnum.ll
    A llvm/test/CodeGen/Mips/fp-maximumnum-minimumnum.ll
    M llvm/test/CodeGen/RISCV/double-intrinsics.ll
    M llvm/test/CodeGen/RISCV/float-intrinsics.ll
    M llvm/test/TableGen/GlobalISelEmitter.td
    M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
    M llvm/unittests/ADT/APFloatTest.cpp
    M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
    M llvm/unittests/IR/VPIntrinsicTest.cpp

  Log Message:
  -----------
  Intrinsic: introduce minimumnum and maximumnum (#93841)

Currently, on different platform, the behaivor of llvm.minnum is
different if one operand is sNaN:

When we compare sNaN vs NUM:

ARM/AArch64/PowerPC: follow the IEEE754-2008's minNUM: return qNaN.
RISC-V/Hexagon follow the IEEE754-2019's minimumNumber: return NUM. X86:
Returns NUM but not same with IEEE754-2019's minimumNumber as
     +0.0 is not always greater than -0.0.
MIPS/LoongArch/Generic: return NUM.
LIBCALL: returns qNaN.

So, let's introduce llvm.minmumnum/llvm.maximumnum, which always follow
IEEE754-2019's minimumNumber/maximumNumber.

Half-fix: #93033



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