[all-commits] [llvm/llvm-project] e2296d: [mlir][ArmSME] Lower extract from 2D scalable crea...

[Benjamin Maxwell via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e2296d8295516e9991cd6ca99ba193fbd232b6da
      https://github.com/llvm/llvm-project/commit/e2296d8295516e9991cd6ca99ba193fbd232b6da
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2024-06-20 (Thu, 20 Jun 2024)

  Changed paths:
    M mlir/include/mlir/Conversion/Passes.td
    M mlir/lib/Conversion/VectorToArmSME/CMakeLists.txt
    M mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp
    M mlir/lib/Conversion/VectorToArmSME/VectorToArmSMEPass.cpp
    M mlir/test/Conversion/VectorToArmSME/unsupported.mlir
    M mlir/test/Conversion/VectorToArmSME/vector-to-arm-sme.mlir

  Log Message:
  -----------
  [mlir][ArmSME] Lower extract from 2D scalable create_mask to psel (#96066)

Example:
```mlir
%mask = vector.create_mask %a, %b : vector<[4]x[8]xi1>
%slice = vector.extract %mask[%index]
           : vector<[8]xi1> from vector<[4]x[8]xi1>
```
Becomes:
```mlir
%mask_rows = vector.create_mask %a : vector<[4]xi1>
%mask_cols = vector.create_mask %b : vector<[8]xi1>
%slice = arm_sve.psel %mask_cols, %mask_rows[%index]
           : vector<[8]xi1>, vector<[4]xi1>
```

Note: While psel is under ArmSVE it requires SME (or SVE 2.1), so this
is currently the most logical place for this lowering.



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