[all-commits] [llvm/llvm-project] aede38: [RISCV] Add processor definition for SpacemiT-X60 ...

[Shao-Ce SUN via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: aede380210b4b86b821f3ec24b506f0d5a6928c9
      https://github.com/llvm/llvm-project/commit/aede380210b4b86b821f3ec24b506f0d5a6928c9
  Author: Shao-Ce SUN <sunshaoce at outlook.com>
  Date:   2024-06-18 (Tue, 18 Jun 2024)

  Changed paths:
    M clang/test/Driver/riscv-cpus.c
    M clang/test/Misc/target-invalid-cpu-note.c
    M llvm/lib/Target/RISCV/RISCVProcessors.td

  Log Message:
  -----------
  [RISCV] Add processor definition for SpacemiT-X60 (#94564)

SpacemiT-X60 is an RVV 1.0 core integrated into the SpacemiT-K1, an
8-core SoC, and it is incorporated into the BPi-F3 development board.

According to the
[document](https://developer.spacemit.com/#/documentation?token=BWbGwbx7liGW21kq9lucSA6Vnpb),
relevant information for extensions has been obtained.

BPi-F3 Datasheet:
https://docs.banana-pi.org/en/BPI-F3/SpacemiT_K1_datasheet
Spacemit-K1 Datasheet:
https://developer.spacemit.com/#/documentation?token=DBd4wvqoqi2fiqkiERTcbEDknBh



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