[all-commits] [llvm/llvm-project] d3da13: [RISCV] Add coverage for vsetvli insertion at O0 [...

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d3da134487ca62da09c51ec598798bf8eff027d3
      https://github.com/llvm/llvm-project/commit/d3da134487ca62da09c51ec598798bf8eff027d3
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2024-06-17 (Mon, 17 Jun 2024)

  Changed paths:
    A llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-O0.ll

  Log Message:
  -----------
  [RISCV] Add coverage for vsetvli insertion at O0 [nfc]

In review around https://github.com/llvm/llvm-project/pull/94686, we had
a discussion about a possible O0 specific miscompile case without test
coverage. The particular case turned out not be possible to exercise in
practice, but improving our test coverage remains a good idea if we're
going to have differences in the dataflow with and without live intervals.



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