[all-commits] [llvm/llvm-project] 657ec7: [mlir][ArmSVE] Lower predicate-sized vector.create...

[Benjamin Maxwell via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 657ec7320d8a28171755ba0dd5afc570a5a16791
      https://github.com/llvm/llvm-project/commit/657ec7320d8a28171755ba0dd5afc570a5a16791
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2024-06-17 (Mon, 17 Jun 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td
    M mlir/lib/Dialect/ArmSVE/Transforms/LegalizeForLLVMExport.cpp
    M mlir/test/Dialect/ArmSVE/legalize-for-llvm.mlir
    M mlir/test/Target/LLVMIR/arm-sve.mlir

  Log Message:
  -----------
  [mlir][ArmSVE] Lower predicate-sized vector.create_masks to whilelt (#95531)

This produces better/more canonical codegen than the generic LLVM
lowering, which is a pattern the backend currently does not recognize.
See: https://github.com/llvm/llvm-project/issues/81840.



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