[all-commits] [llvm/llvm-project] 4f54b9: [SDPatternMatch] Only match ISD::SIGN_EXTEND in m_...

c8ef via All-commits all-commits at lists.llvm.org
Fri Jun 14 02:44:51 PDT 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4f54b91842ea2ab9546459869df442f7e7fe59d6
      https://github.com/llvm/llvm-project/commit/4f54b91842ea2ab9546459869df442f7e7fe59d6
  Author: c8ef <c8ef at outlook.com>
  Date:   2024-06-14 (Fri, 14 Jun 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/SDPatternMatch.h
    M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp

  Log Message:
  -----------
  [SDPatternMatch] Only match ISD::SIGN_EXTEND in m_SExt (#95415)

Context: https://github.com/llvm/llvm-project/pull/95365#discussion_r1638236603

The current implementation of `m_SExt` matches both `ISD::SIGN_EXTEND` and `ISD::SIGN_EXTEND_INREG`. However, in cases where we specifically need to match _only_ `ISD::SIGN_EXTEND`, such as in the SelectionDAG graph below, this can lead to issues and unintended combinations.

```
SelectionDAG has 13 nodes:
  t0: ch,glue = EntryToken
          t2: v2i32,ch = CopyFromReg t0, Register:v2i32 %0
        t21: v2i32 = sign_extend_inreg t2, ValueType:ch:v2i8
          t4: v2i32,ch = CopyFromReg t0, Register:v2i32 %1
        t22: v2i32 = sign_extend_inreg t4, ValueType:ch:v2i8
      t23: v2i32 = avgfloors t21, t22
    t24: v2i32 = sign_extend_inreg t23, ValueType:ch:v2i8
  t15: ch,glue = CopyToReg t0, Register:v2i32 $d0, t24
  t16: ch = AArch64ISD::RET_GLUE t15, Register:v2i32 $d0, t15:1
```



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