[all-commits] [llvm/llvm-project] cb021f: [RISCV] Don't use SEW=16 .vf instructions to move ...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: cb021f5e46d259876ccf0aa24db48c10369f3d61
      https://github.com/llvm/llvm-project/commit/cb021f5e46d259876ccf0aa24db48c10369f3d61
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-06-13 (Thu, 13 Jun 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
    M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vselect-fp.ll

  Log Message:
  -----------
  [RISCV] Don't use SEW=16 .vf instructions to move scalar bf16 into a vector.

The instructions are only defined to operator f16 data. If the
scalar FPR register isn't properly nan-boxed, these instructions
will create a fp16 nan not a bf16 nan in the vector register.



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