[all-commits] [llvm/llvm-project] 5c9352: DAG: Replace bitwidth with type in suffix in atomi...

[Matt Arsenault via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5c9352eb0258d506fb96f4a69e44f1d2fa284f1d
      https://github.com/llvm/llvm-project/commit/5c9352eb0258d506fb96f4a69e44f1d2fa284f1d
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-06-13 (Thu, 13 Jun 2024)

  Changed paths:
    M llvm/include/llvm/Target/TargetSelectionDAG.td
    M llvm/lib/Target/AArch64/AArch64InstrFormats.td
    M llvm/lib/Target/AArch64/AArch64InstrGISel.td
    M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
    M llvm/lib/Target/AMDGPU/BUFInstructions.td
    M llvm/lib/Target/AMDGPU/DSInstructions.td
    M llvm/lib/Target/AMDGPU/EvergreenInstructions.td
    M llvm/lib/Target/AMDGPU/FLATInstructions.td
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    M llvm/lib/Target/AVR/AVRInstrInfo.td
    M llvm/lib/Target/BPF/BPFInstrInfo.td
    M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
    M llvm/lib/Target/Mips/Mips64InstrInfo.td
    M llvm/lib/Target/Mips/MipsInstrInfo.td
    M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
    M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
    M llvm/lib/Target/PowerPC/PPCInstrInfo.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoA.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
    M llvm/lib/Target/Sparc/SparcInstr64Bit.td
    M llvm/lib/Target/Sparc/SparcInstrInfo.td
    M llvm/lib/Target/SystemZ/SystemZInstrInfo.td
    M llvm/lib/Target/VE/VEInstrInfo.td
    M llvm/lib/Target/WebAssembly/WebAssemblyInstrAtomics.td
    M llvm/lib/Target/X86/X86InstrCompiler.td
    M llvm/lib/Target/X86/X86InstrMisc.td
    M llvm/test/TableGen/HasNoUse.td

  Log Message:
  -----------
  DAG: Replace bitwidth with type in suffix in atomic tablegen ops (#94845)



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