[all-commits] [llvm/llvm-project] 25af23: [RISCV] Add test coverage for #95284

Simon Pilgrim via All-commits all-commits at lists.llvm.org
Wed Jun 12 11:56:14 PDT 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 25af23f52a62e9f0d835ae167567ceb9831546a7
      https://github.com/llvm/llvm-project/commit/25af23f52a62e9f0d835ae167567ceb9831546a7
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-06-12 (Wed, 12 Jun 2024)

  Changed paths:
    A llvm/test/CodeGen/RISCV/pr95284.ll

  Log Message:
  -----------
  [RISCV] Add test coverage for #95284


  Commit: 987b59abd0f7353cabf2f620a61ec903a885522a
      https://github.com/llvm/llvm-project/commit/987b59abd0f7353cabf2f620a61ec903a885522a
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-06-12 (Wed, 12 Jun 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    A llvm/test/CodeGen/X86/pr95278.ll

  Log Message:
  -----------
  [X86] SimplifyDemandedVectorEltsForTargetNode - use EVT for F16C nodes

As we allow these nodes to be created pre-legalization, we can't rely on them having a simple VT

Fixes #95278


Compare: https://github.com/llvm/llvm-project/compare/31440738bd6b...987b59abd0f7

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