[all-commits] [llvm/llvm-project] 017049: [MLIR][Vector] Implement TransferOpReduceRank as M...

[Hugo Trachino via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0170498a7ddf84a404527ec3f0e82a4a3d10869a
      https://github.com/llvm/llvm-project/commit/0170498a7ddf84a404527ec3f0e82a4a3d10869a
  Author: Hugo Trachino <hugo.trachino at huawei.com>
  Date:   2024-06-12 (Wed, 12 Jun 2024)

  Changed paths:
    M mlir/lib/Dialect/Vector/Transforms/LowerVectorTransfer.cpp
    M mlir/test/Dialect/Vector/vector-transfer-permutation-lowering.mlir

  Log Message:
  -----------
  [MLIR][Vector] Implement TransferOpReduceRank as MaskableOpRewritePattern (#92426)

Implements `TransferOpReduceRank` as a `MaskableOpRewritePattern`.
Allowing to exit gracefully when run on a `vector::transfer_read`
located inside a `vector::MaskOp` instead of generating  `error: 'vector.mask'
op expects only one operation to mask` because the
pattern generated multiple ops inside the MaskOp.

Split of https://github.com/llvm/llvm-project/pull/90835



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