[all-commits] [llvm/llvm-project] acf9c6: AMDGPU: Fix using wrong memory type for non-image ...

Matt Arsenault via All-commits all-commits at lists.llvm.org
Mon Jun 10 05:11:17 PDT 2024


  Branch: refs/heads/users/arsenm/amdgpu-cleanup-buffer-patterns
  Home:   https://github.com/llvm/llvm-project
  Commit: acf9c6b0ad24ce928f218de78e421f173eb15bf3
      https://github.com/llvm/llvm-project/commit/acf9c6b0ad24ce928f218de78e421f173eb15bf3
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-06-10 (Mon, 10 Jun 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/BUFInstructions.td
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    A llvm/test/CodeGen/AMDGPU/buffer-intrinsic-mmo-type.ll

  Log Message:
  -----------
  AMDGPU: Fix using wrong memory type for non-image resource intrinsics

An 8 x i16/f16/bf16 raw load was incorrectly using a 64-bit memory type, which
would assert in the MachineMemOperand constructor.

This is preparation for a cleanup which will make the buffer intrinsics
work for all legal types.


  Commit: 66038611aff78791fabd72a1ae382399c81284df
      https://github.com/llvm/llvm-project/commit/66038611aff78791fabd72a1ae382399c81284df
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-06-10 (Mon, 10 Jun 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/BUFInstructions.td
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.ll
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.ll

  Log Message:
  -----------
  AMDGPU: Fix buffer intrinsic handling for various 16-bit elements.

Mostly fixes handling of bfloat vectors, but also some missing
i16 cases.


  Commit: 2d30d2cf4b997cd4c3bfeacabaf2b876146f24cf
      https://github.com/llvm/llvm-project/commit/2d30d2cf4b997cd4c3bfeacabaf2b876146f24cf
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-06-10 (Mon, 10 Jun 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.bf16.ll

  Log Message:
  -----------
  AMDGPU: Fix buffer intrinsic store of bfloat


  Commit: daac011f22e3019ed76dd71ca0872d7dcf014889
      https://github.com/llvm/llvm-project/commit/daac011f22e3019ed76dd71ca0872d7dcf014889
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-06-10 (Mon, 10 Jun 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/BUFInstructions.td
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.td

  Log Message:
  -----------
  AMDGPU: Cleanup selection patterns for buffer loads

We should just support these for all register types.


Compare: https://github.com/llvm/llvm-project/compare/acf9c6b0ad24%5E...daac011f22e3

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