[all-commits] [llvm/llvm-project] a284bd: [DAG] Fold fdiv X, c2 -> fmul X, 1/c2 without Allo...

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a284bdb31146160352da905a888da738f2661b50
      https://github.com/llvm/llvm-project/commit/a284bdb31146160352da905a888da738f2661b50
  Author: David Green <david.green at arm.com>
  Date:   2024-06-09 (Sun, 09 Jun 2024)

  Changed paths:
    M llvm/include/llvm/ADT/APFloat.h
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/AArch64/fcvt-fixed.ll
    M llvm/test/CodeGen/AArch64/fdiv-const.ll
    M llvm/test/CodeGen/AArch64/frem-power2.ll
    M llvm/test/CodeGen/AMDGPU/uniform-phi-with-undef.ll
    M llvm/test/CodeGen/ARM/frem-power2.ll
    M llvm/test/CodeGen/ARM/vdiv_combine.ll
    M llvm/test/CodeGen/X86/avx512-broadcast-unfold.ll
    M llvm/test/CodeGen/X86/change-unsafe-fp-math.ll

  Log Message:
  -----------
  [DAG] Fold fdiv X, c2 -> fmul X, 1/c2 without AllowReciprocal if exact (#93882)

This moves the combine of fdiv by constant to fmul out of an
'if (Options.UnsafeFPMath || Flags.hasAllowReciprocal()' block,
so that it triggers if the divide is exact. An extra check for
Recip.isDenormal() is added as multiple places make reference
to it being unsafe or slow on certain platforms.



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