[all-commits] [llvm/llvm-project] 25506f: [SDISel][Combine] Constant fold FP16_TO_FP (#94790)

[Quentin Colombet via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 25506f48643b65e48c6bd501855589fff8983933
      https://github.com/llvm/llvm-project/commit/25506f48643b65e48c6bd501855589fff8983933
  Author: Quentin Colombet <quentin.colombet at gmail.com>
  Date:   2024-06-08 (Sat, 08 Jun 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
    M llvm/test/CodeGen/AMDGPU/select-phi-s16-fp.ll
    M llvm/test/CodeGen/ARM/arm-half-promote.ll

  Log Message:
  -----------
  [SDISel][Combine] Constant fold FP16_TO_FP (#94790)

In some case, constant can survive early constant folding optimization
because they are hidden behind several layers of type changes.

E.g., consider the following sequence (extracted from the arm test that
this commit changes):
```
    t2: v1f16 = BUILD_VECTOR ConstantFP:f16<APFloat(0)>
    t4: v1f16 = insert_vector_elt t2, ConstantFP:f16<APFloat(0)>, Constant:i32<0>
  t5: f16 = bitcast t4
t6: f32 = fp_extend t5
```

Because the constant (APFloat(0)) is hidden behind a <1 x ty> type, all
the constant folding that normally happen for scalar nodes when using
`SelectionDAG::getNode` are blocked.

As a result the constant manages to survive as an actual conversion
instruction down to the select phase:
```
t11: f32 = fp16_to_fp Constant:i32<0>
```

With the change in this patch, we try to do constant folding one more
time during dag combine, which in the motivating example result in the
much better sequence:
```
t7: ch = CopyToReg t0, Register:f32 %0, ConstantFP:f32<0.000000e+00>
```

Note: I'm sure we have this problem in a lot of other places. Generally
speaking I believe SDISel is not that good with <1 x ty> compared to
pure scalar. However, I only changed what I could easily test.



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