[all-commits] [llvm/llvm-project] f7018b: [AArch64] Add patterns for add(uzp1(x, y), uzp2(x, ...

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f7018ba0eeaad8dc3e1917cfb986fc9689d72e85
      https://github.com/llvm/llvm-project/commit/f7018ba0eeaad8dc3e1917cfb986fc9689d72e85
  Author: David Green <david.green at arm.com>
  Date:   2024-06-07 (Fri, 07 Jun 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/addp-shuffle.ll
    M llvm/test/CodeGen/AArch64/arm64-uzp.ll
    M llvm/test/CodeGen/AArch64/insert-extend.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-permute-zip-uzp-trn.ll

  Log Message:
  -----------
  [AArch64] Add patterns for add(uzp1(x,y), uzp2(x, y)) -> addp.

If we are extracting the even lanes and the odd lanes and adding them, we can
use an addp instruction.



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