[all-commits] [llvm/llvm-project] 0559ea: Revert "Pass LangOpts from CompilerInstance to Dep...
Krzysztof Parzyszek via All-commits
all-commits at lists.llvm.org
Fri Jun 7 05:58:45 PDT 2024
Branch: refs/heads/users/kparzysz/spr/b02-directive-category
Home: https://github.com/llvm/llvm-project
Commit: 0559eaff5ac4afae14dcbb6396da2a0c3f325cd8
https://github.com/llvm/llvm-project/commit/0559eaff5ac4afae14dcbb6396da2a0c3f325cd8
Author: Nishith Kumar M Shah <nishithshah.2211 at gmail.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M clang/include/clang/Lex/DependencyDirectivesScanner.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningFilesystem.h
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Lex/DependencyDirectivesScanner.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningFilesystem.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/unittests/Lex/DependencyDirectivesScannerTest.cpp
M clang/unittests/Lex/PPDependencyDirectivesTest.cpp
Log Message:
-----------
Revert "Pass LangOpts from CompilerInstance to DependencyScanningWorker (#93753)" (#94488)
This reverts commit 9862080b1cbf685c0d462b29596e3f7206d24aa2.
Commit: 4f40dfc2fdb6109702a4fcddff15d352eb216403
https://github.com/llvm/llvm-project/commit/4f40dfc2fdb6109702a4fcddff15d352eb216403
Author: Joshua Cranmer <joshua.cranmer at intel.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M llvm/include/llvm/IR/Operator.h
Log Message:
-----------
[IR] Remove the possibility of ConstantExpr having fast-math flags. (#94507)
This possibility was added in https://reviews.llvm.org/D34303 to resolve
some assertion failures with cases where FP math operations got
constant-folded in constant expressions. However, at no point did the IR
representation allow for expressing fast-math flags on constant
expressions.
With the change of https://github.com/llvm/llvm-project/pull/93038,
there are no longer any constant expressions capable of being FP math
operators, and thus FPMathOperator can go back to being
Instruction-only.
Commit: c8d63516ac9e15831975392dd9f6b9ae6a31b21c
https://github.com/llvm/llvm-project/commit/c8d63516ac9e15831975392dd9f6b9ae6a31b21c
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M llvm/test/Analysis/ScalarEvolution/trip-count-unknown-stride.ll
Log Message:
-----------
[SCEV] Add coverage for howFarToZero w/ non-constant strides
Specifically, cases which require context sensative reasoning which
the current code doesn't do.
Commit: 3d44926712389945468a566c9058b2e715f8f2ad
https://github.com/llvm/llvm-project/commit/3d44926712389945468a566c9058b2e715f8f2ad
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/math/libc_math_test_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/src/math/smoke/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel
Log Message:
-----------
[bazel] Sync config with main (#94521)
Commit: 1d8743359360d3d960d599e03e62537dc108aae2
https://github.com/llvm/llvm-project/commit/1d8743359360d3d960d599e03e62537dc108aae2
Author: Farzon Lotfi <1802579+farzonl at users.noreply.github.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/IR/RuntimeLibcalls.def
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/llvm.tan.ll
M llvm/test/CodeGen/X86/vec-libcalls.ll
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-VF2-VF8.ll
M llvm/test/Transforms/LoopVectorize/X86/svml-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/veclib-calls.ll
Log Message:
-----------
[x86] Add tan intrinsic part 4 (#90503)
This change is an implementation of #87367's investigation on supporting
IEEE math operations as intrinsics.
Which was discussed in this RFC:
https://discourse.llvm.org/t/rfc-all-the-math-intrinsics/78294
Much of this change was following how G_FSIN and G_FCOS were used.
Changes:
- `llvm/docs/GlobalISel/GenericOpcode.rst` - Document the `G_FTAN`
opcode
- `llvm/docs/LangRef.rst` - Document the tan intrinsic
- `llvm/include/llvm/Analysis/VecFuncs.def` - Associate the tan
intrinsic as a vector function similar to the tanf libcall.
- `llvm/include/llvm/CodeGen/BasicTTIImpl.h` - Map the tan intrinsic to
`ISD::FTAN`
- `llvm/include/llvm/CodeGen/ISDOpcodes.h` - Define ISD opcodes for
`FTAN` and `STRICT_FTAN`
- `llvm/include/llvm/IR/Intrinsics.td` - Create the tan intrinsic
- `llvm/include/llvm/IR/RuntimeLibcalls.def` - Define tan libcall
mappings
- `llvm/include/llvm/Target/GenericOpcodes.td` - Define the `G_FTAN`
Opcode
- `llvm/include/llvm/Support/TargetOpcodes.def` - Create a `G_FTAN`
Opcode handler
- `llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td` - Map
`G_FTAN` to `ftan`
- `llvm/include/llvm/Target/TargetSelectionDAG.td` - Define `ftan`,
`strict_ftan`, and `any_ftan` and map them to the ISD opcodes for `FTAN`
and `STRICT_FTAN`
- `llvm/lib/Analysis/VectorUtils.cpp` - Associate the tan intrinsic as a
vector intrinsic
- `llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp` Map the tan intrinsic
to `G_FTAN` Opcode
- `llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp` - Add `G_FTAN` to
the list of floating point math operations also associate `G_FTAN` with
the `TAN_F` runtime lib.
- `llvm/lib/CodeGen/GlobalISel/Utils.cpp` - More floating point math
operation common behaviors.
- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp - List the function
expansion operations for `FTAN` and `STRICT_FTAN`. Also define both
opcodes in `PromoteNode`.
- `llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp` - More `FTAN`
and `STRICT_FTAN` handling in the legalizer
- `llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h` - Define
`SoftenFloatRes_FTAN` and `ExpandFloatRes_FTAN`.
- `llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp` - Define `FTAN`
as a legal vector operation.
- `llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp` - Define
`FTAN` as a legal vector operation.
- `llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp` - define tan as an
intrinsic that doesn't return NaN.
- `llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp` Map
`LibFunc_tan`, `LibFunc_tanf`, and `LibFunc_tanl` to `ISD::FTAN`. Map
`Intrinsic::tan` to `ISD::FTAN` and add selection dag handling for
`Intrinsic::tan`.
- `llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp` - Define `ftan`
and `strict_ftan` names for the equivalent ISD opcodes.
- `llvm/lib/CodeGen/TargetLoweringBase.cpp` -Define a Tan128 libcall and
ISD::FTAN as a target lowering action.
- `llvm/lib/Target/X86/X86ISelLowering.cpp` - Add x86_64 lowering for
tan intrinsic
resolves https://github.com/llvm/llvm-project/issues/70082
Commit: 3ac6a646d40cb16aebb3467007efa2e499383a3d
https://github.com/llvm/llvm-project/commit/3ac6a646d40cb16aebb3467007efa2e499383a3d
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
A llvm/test/Transforms/LoopStrengthReduce/RISCV/many-geps.ll
Log Message:
-----------
[RISCV][test] Precommit LSR test that partially motivates #89927
Commit: 21711f89b9d85028160611f725bd33d7832d1d46
https://github.com/llvm/llvm-project/commit/21711f89b9d85028160611f725bd33d7832d1d46
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
Log Message:
-----------
[LegalizeVectorOps] Move VP_STORE legalization from LegalizeDAG to LegalizeVectorOps.
705636a1130551ab105aec95b909a35a0305fc9f moved reductions from
LegalizeVectorOps to LegalizeDAG, but the way it was done inadvertently
moved stores from LegalizeVectorOps to LegalizeDAG too. This was
not intended or desired.
Found when this was pulled into my downstream which has other changes
that make the distinction important.
Commit: 73a2fd470c58eb10e2e51466a053dd30b63bbe7a
https://github.com/llvm/llvm-project/commit/73a2fd470c58eb10e2e51466a053dd30b63bbe7a
Author: Artem Kroviakov <71938912+akroviakov at users.noreply.github.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
Log Message:
-----------
[mlir][xegpu] Patch dynamic descriptor creation (#93580)
fixes the bug in XeGPU's `CreateNdDescOp` tensor creation with dynamic offset and strides.
Commit: 3beb232fb4fd1943155174d58a454493828cd719
https://github.com/llvm/llvm-project/commit/3beb232fb4fd1943155174d58a454493828cd719
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M clang/lib/Interpreter/IncrementalParser.cpp
M clang/lib/Sema/SemaDecl.cpp
Log Message:
-----------
Fix clang reject valid C++ code after d999ce0302f06d250f6d496b56a5a5f (#94471)
The incremental processing mode doesn't seem to work well for C++, see
the
https://github.com/llvm/llvm-project/pull/89804#issuecomment-2149840711
for details.
Commit: a4b32c25761e3de55d42a4799a303f36aa198fb7
https://github.com/llvm/llvm-project/commit/a4b32c25761e3de55d42a4799a303f36aa198fb7
Author: Martin Storsjö <martin at martin.st>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M compiler-rt/lib/builtins/atomic.c
Log Message:
-----------
Revert "[compiler-rt][builtins] Switch libatomic locks to pthread_mutex_t (#94374)"
This reverts commit b62b7a42bbee4a3bbf9094808f460fdc9c119bd7 and
a5729b71d844c1444f7d348dc2d4ea5b98de5ec5.
This commit broke compilation for systems that lack pthreads.
Commit: b477d1de6e3a5e5860fe7fdf272e8bbb6a330f48
https://github.com/llvm/llvm-project/commit/b477d1de6e3a5e5860fe7fdf272e8bbb6a330f48
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/type_traits.h
A libc/src/__support/CPP/type_traits/aligned_storage.h
M libc/test/src/__support/CPP/type_traits_test.cpp
Log Message:
-----------
[libc][type_traits] Add aligned_storage (#94074)
Commit: f8afa763c6194f5bf485480e1fb94b953942f876
https://github.com/llvm/llvm-project/commit/f8afa763c6194f5bf485480e1fb94b953942f876
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M lldb/examples/python/crashlog.py
M lldb/test/Shell/ScriptInterpreter/Python/Crashlog/lit.local.cfg
Log Message:
-----------
[lldb/crashlog] Use environment variable to manually set dsymForUUIDBinary (#94517)
In lldb, users can change the `dsymForUUID` binary using the
`LLDB_APPLE_DSYMFORUUID_EXECUTABLE` environment variable.
This patch changes the crashlog to support the same behaviour as lldb
and uses this environment variable to disable `dsymForUUID` lookups in
crashlog test by having it be empty. Since CI bots shoudn't have access
to images on build records, it doesn't make sense to make use of
`dsymForUUID` in tests.
rdar://128953725
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: e675d0d5cd4047bcf4ec368d2b4c19a57e5347f3
https://github.com/llvm/llvm-project/commit/e675d0d5cd4047bcf4ec368d2b4c19a57e5347f3
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/Basic/OpenACCClauses.def
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/Sema/SemaOpenACC.cpp
Log Message:
-----------
[OpenACC][NFC] Refactor SemaOpenACC to use a visitor
This code was getting unwieldy, so a quick patch to refactor it a bit.
Commit: d99cf1b916ddcfad60c706840ddfd5d2f1409f2a
https://github.com/llvm/llvm-project/commit/d99cf1b916ddcfad60c706840ddfd5d2f1409f2a
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/MutableBox.cpp
A flang/test/Lower/HLFIR/assumed-rank-inquiries.f90
Log Message:
-----------
[flang] lower assumed-rank inquiries - part 1 (#94475)
Lower assumed-rank inquiries, except SIZE/SHAPE/UBOUND/LBOUND. This is
mainly about adding tests, and removing a couple TODOs in helpers.
Commit: c599894aa63747f338544eaa3038eb9f132a5bbd
https://github.com/llvm/llvm-project/commit/c599894aa63747f338544eaa3038eb9f132a5bbd
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Log Message:
-----------
[RISCV] Remove policy and merge operand from unmasked vmsbf/vmsif/vmsof.m. (#94530)
These instructions always update the destination under a tail agnostic
policy.
Commit: a74348ca66d599d3fbc7e28bf55445de53bb9838
https://github.com/llvm/llvm-project/commit/a74348ca66d599d3fbc7e28bf55445de53bb9838
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/test/CodeGen/RISCV/rvv/vmsbf.ll
M llvm/test/CodeGen/RISCV/rvv/vmsif.ll
M llvm/test/CodeGen/RISCV/rvv/vmsof.ll
Log Message:
-----------
[RISCV] Use ForceTailAgnostic for masked vmsbf/vmsif/vmsof.m. (#94532)
These instructions use the mask policy, but always update the
destination under tail agnostic policy.
Commit: 20483edd27bd3221e72c101de08d40782a5d2c2c
https://github.com/llvm/llvm-project/commit/20483edd27bd3221e72c101de08d40782a5d2c2c
Author: Michael Jones <michaelrj at google.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M libc/src/sys/epoll/linux/CMakeLists.txt
M libc/src/sys/epoll/linux/epoll_pwait.cpp
M libc/src/sys/epoll/linux/epoll_pwait2.cpp
M libc/src/sys/epoll/linux/epoll_wait.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc] Unpoison epoll structs (#94536)
The epoll wait functions return structs via pointer, but those structs
need to be unpoisoned before return. This patch adds that unpoisoning.
Commit: 0e743ecca018e9fa7482dc8bec62eae8cd0c929b
https://github.com/llvm/llvm-project/commit/0e743ecca018e9fa7482dc8bec62eae8cd0c929b
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
VPlan/PatternMatch: introduce m_c_Mul (NFC) (#93950)
Introduce a commutative version of m_Mul, and simplify a usage based on
it.
Commit: 53ddc87454669c0d595c0e3d3174e35cdc4b0a61
https://github.com/llvm/llvm-project/commit/53ddc87454669c0d595c0e3d3174e35cdc4b0a61
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
M mlir/test/Dialect/Vector/vector-transfer-flatten.mlir
Log Message:
-----------
[mlir][vector] Improve flattening vector.transfer_write ops. (#94051)
We can flatten the transfer ops even when the collapsed indices are not
zeros. We can compute it. It is already supported in
vector.transfer_read cases. The revision refactors the logic and reuse
it in transfer_write cases.
Commit: 55d2fffdae5531759569e4ea8985c3de2e96bcc1
https://github.com/llvm/llvm-project/commit/55d2fffdae5531759569e4ea8985c3de2e96bcc1
Author: Sandeep Dasgupta <sdasgup at google.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M mlir/include/mlir-c/IR.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/CAPI/IR/IR.cpp
M mlir/test/python/ir/blocks.py
Log Message:
-----------
[mlir][python]Python Bindings for select edit operations on Block arguments (#94305)
The PR implements MLIR Python Bindings for a few simple edit operations
on Block arguments, namely, `add_argument`, `erase_argument`, and
`erase_arguments`.
Commit: 1d75c59ace2c9fc4e9a94907748d9555cd4a7d14
https://github.com/llvm/llvm-project/commit/1d75c59ace2c9fc4e9a94907748d9555cd4a7d14
Author: Eric <eric at efcs.ca>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M libcxx/include/__type_traits/datasizeof.h
Log Message:
-----------
Fix detection of __datasizeof with Clang. (#94174)
The `__has_extension` builtin macro is the same as __has_feature when
-pedantic-errors is specified, which means we don't get the right
information about __datasizeof being available.
Using __has_keyword (really !__is_identifier) will tell the truth
even when -pedantic-errors is specified.
This means we always have __datasizeof under Clang
Commit: 19bce1702bd1e399bea76d0de2a649a14551b000
https://github.com/llvm/llvm-project/commit/19bce1702bd1e399bea76d0de2a649a14551b000
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
A lldb/test/API/lang/c/inlines/Makefile
M lldb/test/API/lang/c/inlines/TestRedefinitionsInInlines.py
M lldb/test/API/lang/c/inlines/main.c
Log Message:
-----------
[lldb] [NFC] Rewrite TestRedefinitionsInInlines.py as an API test (#94539)
Rewrite an inline test as an API test, to be a little easier to debug,
and add some additional checks that we're in the inlined test1, then
step and we are now in the inlined test2 functions.
Commit: 68a9cb799511506045ca26c04e7933f0e0ed46ec
https://github.com/llvm/llvm-project/commit/68a9cb799511506045ca26c04e7933f0e0ed46ec
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M lldb/examples/python/crashlog.py
M lldb/examples/python/crashlog_scripted_process.py
Log Message:
-----------
[lldb/crashlog] Add `--no-parallel-image-loading` hidden flag (#94513)
This patch adds the `--no-parallel-image-loading` to the crashlog
command. By default, image loading will happen in parallel in the
crashlog script however, sometimes, when running tests or debugging the
crashlog script itself, it's better to load the images sequentially.
As its name suggests, this flag will disable the default image loading
behaviour to load all the images sequencially in the main thread.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: a9342f2eab7993a3be1d1156070c0d2de21ed973
https://github.com/llvm/llvm-project/commit/a9342f2eab7993a3be1d1156070c0d2de21ed973
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Log Message:
-----------
[RISCV] Remove VPseudoBinaryMOutNoMask. NFC (#94531)
It appears to be identical to VPseudoBinaryNoMask. The comment above it
doesn't make sense since VPseudoBinaryNoMask doesn't restrict the
destination register to not include V0. Looks like a copy/paste from
VPseudoBinaryMOutMask.
Commit: dbc3e26c25587e5460ae12caed84cb09197c4ed7
https://github.com/llvm/llvm-project/commit/dbc3e26c25587e5460ae12caed84cb09197c4ed7
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M libc/test/CMakeLists.txt
Log Message:
-----------
[libc][NFC] More verbose warning message on missing utilities
Summary:
The GPU needs both the loader utility and the architecture to be present
to run tests. This simply makes it easier to detect which is missing in
case of problems.
Commit: 2ec122d9662e8e7f034e822fcfb3fc3c372971ba
https://github.com/llvm/llvm-project/commit/2ec122d9662e8e7f034e822fcfb3fc3c372971ba
Author: Daniel Sanders <daniel_l_sanders at apple.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp
Log Message:
-----------
Test commit
Commit: 62c0eaeec9a65c73f3bee0b8b05461f1c628d27c
https://github.com/llvm/llvm-project/commit/62c0eaeec9a65c73f3bee0b8b05461f1c628d27c
Author: Daniel Sanders <daniel_l_sanders at apple.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp
Log Message:
-----------
Revert "Test commit"
This reverts commit 2ec122d9662e8e7f034e822fcfb3fc3c372971ba.
Commit: 798f2019a2fb608450c5ad5dc261d6496cf1eb15
https://github.com/llvm/llvm-project/commit/798f2019a2fb608450c5ad5dc261d6496cf1eb15
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Don't format comments in SkipMacroDefinitionBody (#94425)
Fixes #94326.
Commit: fb8ea85987470ad82b365fb1a78bb66754f927c6
https://github.com/llvm/llvm-project/commit/fb8ea85987470ad82b365fb1a78bb66754f927c6
Author: Alastair Houghton <ahoughton at apple.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
Log Message:
-----------
[RuntimeDyld][ELF] Fix unwanted sign extension. (#94482)
Casting the result of `Section.getAddressWithOffset()` goes wrong if we
are on a 32-bit platform whose addresses are regarded as signed; in that
case, just doing
```
(uint64_t)Section.getAddressWithOffset(...)
```
or
```
reinterpret_cast<uint64_t>(Section.getAddressWithOffset(...))
```
will result in sign-extension.
We use these expressions when constructing branch stubs, which is before
we know the final load address, so we can just switch to the
`Section.getLoadAddressWithOffset(...)` method instead.
Doing that is also more consistent, since when calculating relative
offsets for relocations, we use the load address anyway, so the code
currently only works because `Section.Address` is equal to
`Section.LoadAddress` at this point.
Fixes #94478.
Commit: 4b702946006cfa9be9ab646ce5fc5b25248edd81
https://github.com/llvm/llvm-project/commit/4b702946006cfa9be9ab646ce5fc5b25248edd81
Author: hev <wangrui at loongson.cn>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/test/CodeGen/LoongArch/sextw-removal.ll
Log Message:
-----------
[LoongArch] Add a hook to sign extend i32 ConstantInt operands of phis on LA64 (#93813)
Materializing constants on LoongArch is simpler if the constant is sign
extended from i32. By default i32 constant operands of phis are zero
extended.
This patch adds a hook to allow LoongArch to override this for i32. We
have an existing isSExtCheaperThanZExt, but it operates on EVT which we
don't have at these places in the code.
Commit: d5ab38f69c1a5c1456bc1a8cc936489d31599f33
https://github.com/llvm/llvm-project/commit/d5ab38f69c1a5c1456bc1a8cc936489d31599f33
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/select-fp.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-fp.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll
Log Message:
-----------
[RISCV] Support select/merge like ops for bf16 vectors when have Zvfbfmin (#91936)
Commit: 8e674953264e1545397d9a19a2661e157e8d6525
https://github.com/llvm/llvm-project/commit/8e674953264e1545397d9a19a2661e157e8d6525
Author: Hendrik Hübner <117831077+HendrikHuebner at users.noreply.github.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/math/index.rst
M libc/spec/stdc.td
M libc/src/math/CMakeLists.txt
A libc/src/math/fmaxf16.h
A libc/src/math/fminf16.h
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/fmaxf16.cpp
A libc/src/math/generic/fminf16.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/fmaxf16_test.cpp
A libc/test/src/math/smoke/fminf16_test.cpp
Log Message:
-----------
[libc][math][c23] Implement fmaxf16 and fminf16 function (#94131)
Implements fmaxf16 and fminf16, which are two missing functions listed
here: #93566
Commit: 6ca0f44cd89aa802c306c303764eabf83a7f5029
https://github.com/llvm/llvm-project/commit/6ca0f44cd89aa802c306c303764eabf83a7f5029
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M lldb/source/Expression/DWARFExpression.cpp
Log Message:
-----------
[lldb] Fix inconsistencies in DWARFExpression errors (#94554)
This patch make all errors start with a lowercase letter and removes
trailing periods and newlines. This fixes inconsistencies between error
messages and facilitate concatenating them.
Commit: 63cda2d19c310826722e8724649ceae7307389d7
https://github.com/llvm/llvm-project/commit/63cda2d19c310826722e8724649ceae7307389d7
Author: OverMighty <its.overmighty at gmail.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/c23.rst
M libc/docs/math/index.rst
M libc/spec/stdc.td
M libc/src/math/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/nextafterf16.cpp
A libc/src/math/generic/nextdownf16.cpp
A libc/src/math/generic/nexttowardf16.cpp
A libc/src/math/generic/nextupf16.cpp
A libc/src/math/nextafterf16.h
A libc/src/math/nextdownf16.h
A libc/src/math/nexttowardf16.h
A libc/src/math/nextupf16.h
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/math/smoke/NextAfterTest.h
M libc/test/src/math/smoke/NextTowardTest.h
A libc/test/src/math/smoke/nextafterf16_test.cpp
A libc/test/src/math/smoke/nextdownf16_test.cpp
A libc/test/src/math/smoke/nexttowardf16_test.cpp
A libc/test/src/math/smoke/nextupf16_test.cpp
Log Message:
-----------
[libc][math][c23] Add {nextafter,nexttoward,nextup,nextdown}f16 C23 math functions (#94535)
#93566
Commit: 8c9bb9c506a08b06607c7bf931a384095f0553ee
https://github.com/llvm/llvm-project/commit/8c9bb9c506a08b06607c7bf931a384095f0553ee
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Transforms/Utils/InlineFunction.cpp
Log Message:
-----------
[NFC] Remove unused value (#94439)
Commit: 86dddbe3b54eae22db6e208e6bc1c3cda9b7e149
https://github.com/llvm/llvm-project/commit/86dddbe3b54eae22db6e208e6bc1c3cda9b7e149
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M lldb/examples/python/crashlog.py
M lldb/examples/python/crashlog_scripted_process.py
M lldb/test/Shell/ScriptInterpreter/Python/Crashlog/app_specific_backtrace_crashlog.test
M lldb/test/Shell/ScriptInterpreter/Python/Crashlog/last_exception_backtrace_crashlog.test
Log Message:
-----------
[lldb/crashlog] Always load Application Specific Backtrace Thread images (#94259)
This patch changes the crashlog image loading default behaviour to not
only load images from the crashed thread but also for the application
specific backtrace thread.
This patch also move the Application Specific Backtrace / Last Exception
Backtrace tag from the thread queue field to the thread name.
rdar://128276576
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: c2244f8284f45471aba911f08b33cb72a6e8de9c
https://github.com/llvm/llvm-project/commit/c2244f8284f45471aba911f08b33cb72a6e8de9c
Author: Sam Clegg <sbc at chromium.org>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M llvm/include/llvm/MC/MCSymbolWasm.h
M llvm/lib/MC/WasmObjectWriter.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyUtilities.cpp
M llvm/test/MC/WebAssembly/reloc-pic64.s
Log Message:
-----------
[WebAssembly] Set IS_64 flag correctly on __indirect_function_table in object files (#94487)
Follow up to #92042
Commit: 97c866f6c86456b3316006e6beff47e68a81c00a
https://github.com/llvm/llvm-project/commit/97c866f6c86456b3316006e6beff47e68a81c00a
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/AST/DeclID.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/Serialization/ModuleManager.h
M clang/lib/AST/DeclBase.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ModuleFile.cpp
A clang/test/Modules/no-transitive-decls-change.cppm
Log Message:
-----------
[serialization] no transitive decl change (#92083)
Following of https://github.com/llvm/llvm-project/pull/86912
The motivation of the patch series is that, for a module interface unit
`X`, when the dependent modules of `X` changes, if the changes is not
relevant with `X`, we hope the BMI of `X` won't change. For the specific
patch, we hope if the changes was about irrelevant declaration changes,
we hope the BMI of `X` won't change. **However**, I found the patch
itself is not very useful in practice, since the adding or removing
declarations, will change the state of identifiers and types in most
cases.
That said, for the most simple example,
```
// partA.cppm
export module m:partA;
// partA.v1.cppm
export module m:partA;
export void a() {}
// partB.cppm
export module m:partB;
export void b() {}
// m.cppm
export module m;
export import :partA;
export import :partB;
// onlyUseB;
export module onlyUseB;
import m;
export inline void onluUseB() {
b();
}
```
the BMI of `onlyUseB` will change after we change the implementation of
`partA.cppm` to `partA.v1.cppm`. Since `partA.v1.cppm` introduces new
identifiers and types (the function prototype).
So in this patch, we have to write the tests as:
```
// partA.cppm
export module m:partA;
export int getA() { ... }
export int getA2(int) { ... }
// partA.v1.cppm
export module m:partA;
export int getA() { ... }
export int getA(int) { ... }
export int getA2(int) { ... }
// partB.cppm
export module m:partB;
export void b() {}
// m.cppm
export module m;
export import :partA;
export import :partB;
// onlyUseB;
export module onlyUseB;
import m;
export inline void onluUseB() {
b();
}
```
so that the new introduced declaration `int getA(int)` doesn't introduce
new identifiers and types, then the BMI of `onlyUseB` can keep
unchanged.
While it looks not so great, the patch should be the base of the patch
to erase the transitive change for identifiers and types since I don't
know how can we introduce new types and identifiers without introducing
new declarations. Given how tightly the relationship between
declarations, types and identifiers, I think we can only reach the ideal
state after we made the series for all of the three entties.
The design of the patch is similar to
https://github.com/llvm/llvm-project/pull/86912, which extends the
32-bit DeclID to 64-bit and use the higher bits to store the module file
index and the lower bits to store the Local Decl ID.
A slight difference is that we only use 48 bits to store the new DeclID
since we try to use the higher 16 bits to store the module ID in the
prefix of Decl class. Previously, we use 32 bits to store the module ID
and 32 bits to store the DeclID. I don't want to allocate additional
space so I tried to make the additional space the same as 64 bits. An
potential interesting thing here is about the relationship between the
module ID and the module file index. I feel we can get the module file
index by the module ID. But I didn't prove it or implement it. Since I
want to make the patch itself as small as possible. We can make it in
the future if we want.
Another change in the patch is the new concept Decl Index, which means
the index of the very big array `DeclsLoaded` in ASTReader. Previously,
the index of a loaded declaration is simply the Decl ID minus
PREDEFINED_DECL_NUMs. So there are some places they got used
ambiguously. But this patch tried to split these two concepts.
As https://github.com/llvm/llvm-project/pull/86912 did, the change will
increase the on-disk PCM file sizes. As the declaration ID may be the
most IDs in the PCM file, this can have the biggest impact on the size.
In my experiments, this change will bring 6.6% increase of the on-disk
PCM size. No compile-time performance regression observed. Given the
benefits in the motivation example, I think the cost is worthwhile.
Commit: 8c452d0cc5004d32bcce7a33e6652c19debf7f6d
https://github.com/llvm/llvm-project/commit/8c452d0cc5004d32bcce7a33e6652c19debf7f6d
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/select-fp.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-fp.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll
Log Message:
-----------
Revert "[RISCV] Support select/merge like ops for bf16 vectors when have Zvfbfmin" (#94565)
Reverts llvm/llvm-project#91936
Premerge bots are broken.
Commit: 68413219dba47104fef388364a9973b584126f42
https://github.com/llvm/llvm-project/commit/68413219dba47104fef388364a9973b584126f42
Author: jiajie zhang <56027356+JumpMasterJJ at users.noreply.github.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M flang/docs/Intrinsics.md
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/Command.h
M flang/include/flang/Runtime/command.h
M flang/include/flang/Runtime/magic-numbers.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Command.cpp
M flang/runtime/command.cpp
M flang/runtime/stat.h
A flang/test/Lower/Intrinsics/getcwd-function.f90
A flang/test/Lower/Intrinsics/getcwd-optional.f90
A flang/test/Lower/Intrinsics/getcwd.f90
A flang/test/Semantics/getcwd.f90
Log Message:
-----------
[flang] Add GETCWD runtime and lowering intrinsics implementation (#92746)
This patch add support of intrinsics GNU extension GETCWD
https://github.com/llvm/llvm-project/issues/84203. Some usage info and
example has been added to `flang/docs/Intrinsics.md`. The patch contains
both the lowering and the runtime code and works on both Windows and
Linux.
| System | Implmentation |
|-----------|--------------------|
| Windows | _getcwd |
| Linux |getcwd |
Commit: f6c1e65ddfa9e1a07919104be543a1f9eccbb519
https://github.com/llvm/llvm-project/commit/f6c1e65ddfa9e1a07919104be543a1f9eccbb519
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Type.h
M clang/include/clang/Basic/TokenKinds.def
M clang/lib/AST/Type.cpp
M clang/lib/Sema/SemaExprCXX.cpp
A clang/test/SemaCXX/builtin-is-bitwise-cloneable-fsanitize.cpp
A clang/test/SemaCXX/builtin-is-bitwise-cloneable.cpp
M clang/test/SemaObjCXX/arc-type-traits.mm
Log Message:
-----------
[clang] Implement a __is_bitwise_cloneable builtin type trait. (#86512)
This patch implements a `__is_bitwise_cloneable` builtin in clang.
The builtin is used as a guard to check a type can be safely bitwise
copied by memcpy. It's functionally similar to
`__is_trivially_copyable`, but covers a wider range of types (e.g.
classes with virtual functions). The compiler guarantees that after
copy, the destination object has the same object representations as the
source object. And it is up to user to guarantee that program semantic
constraints are satisfied.
Context:
https://discourse.llvm.org/t/extension-for-creating-objects-via-memcpy
Commit: 46edc02eaac81bfdace3e1f906751cad114790da
https://github.com/llvm/llvm-project/commit/46edc02eaac81bfdace3e1f906751cad114790da
Author: hev <wangrui at loongson.cn>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/lib/Basic/Targets/LoongArch.h
M llvm/docs/ReleaseNotes.rst
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
Log Message:
-----------
[LoongArch] Adjust LA64 data layout by using n32:64 in layout string (#93814)
Although i32 type is illegal in the backend, LA64 has pretty good
support for i32 types by using W instructions.
By adding n32 to the DataLayout string, middle end optimizations will
consider i32 to be a native type. One known effect of this is enabling
LoopStrengthReduce on loops with i32 induction variables. This can be
beneficial because C/C++ code often has loops with i32 induction
variables due to the use of `int` or `unsigned int`.
If this patch exposes performance issues, those are better addressed by
tuning LSR or other passes.
Commit: 11c08327dab425b67d80e99850e654e4c6c17864
https://github.com/llvm/llvm-project/commit/11c08327dab425b67d80e99850e654e4c6c17864
Author: Christian Ulmann <christianulmann at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M mlir/include/mlir/Target/LLVMIR/Export.h
Log Message:
-----------
[MLIR][LLVM] Improve module translation comment (NFC) (#94577)
This commit enhances the docsting of `translateModuleToLLVMIR` as a
followup to https://github.com/llvm/llvm-project/pull/94445
Commit: fb0c705dbf27e3ab84d726ad30e172806a530c21
https://github.com/llvm/llvm-project/commit/fb0c705dbf27e3ab84d726ad30e172806a530c21
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
Log Message:
-----------
[clang] NFCI: Make ASTContext optional in the AST text dumper again (#94522)
Commit: 60429fbf88607dc3081e9faafb767bfbe996cfaa
https://github.com/llvm/llvm-project/commit/60429fbf88607dc3081e9faafb767bfbe996cfaa
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/select.ll
Log Message:
-----------
[InstCombine] Add more tests for select equivalence fold (NFC)
Commit: 9bea770b63861250c8bbec46f68df73da4f09508
https://github.com/llvm/llvm-project/commit/9bea770b63861250c8bbec46f68df73da4f09508
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select.ll
Log Message:
-----------
[InstCombine] Only requite not-undef in select equiv fold
As the comment already indicates, only replacement with undef
is problematic, as it introduces an additional use of undef.
Use the correct ValueTracking helper.
Commit: 16e2ec82ac45701f9c55ab917e30f38dbae6f79a
https://github.com/llvm/llvm-project/commit/16e2ec82ac45701f9c55ab917e30f38dbae6f79a
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstCombine/select.ll
Log Message:
-----------
[ValueTracking] Make undef element check more precise
If we're only checking for undef, then also only look for undef
elements in the vector (rather than undef and poison).
Commit: e0ac087ff004f7a63ba64b9685f4f098d6ee54c5
https://github.com/llvm/llvm-project/commit/e0ac087ff004f7a63ba64b9685f4f098d6ee54c5
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/include/llvm/Analysis/CodeMetrics.h
M llvm/include/llvm/Analysis/LoopInfo.h
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/Transforms/Utils/UnrollLoop.h
M llvm/lib/Analysis/CodeMetrics.cpp
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollAndJamPass.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/lib/Transforms/Utils/LoopRotationUtils.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp
A llvm/test/Transforms/LoopUnroll/convergent.controlled.ll
Log Message:
-----------
[LoopUnroll] Consider convergence control tokens when unrolling (#91715)
- There is no restriction on a loop with controlled convergent
operations when
the relevant tokens are defined and used within the loop.
- When a token defined outside a loop is used inside (also called a loop
convergence heart), unrolling is allowed only in the absence of
remainder or
runtime checks.
- When a token defined inside a loop is used outside, such a loop is
said to be
"extended". This loop can only be unrolled by also duplicating the
extended part
lying outside the loop. Such unrolling is disabled for now.
- Clean up loop hearts: When unrolling a loop with a heart, duplicating
the
heart will introduce multiple static uses of a convergence control token
in a
cycle that does not contain its definition. This violates the static
rules for
tokens, and needs to be cleaned up into a single occurrence of the
intrinsic.
- Spell out the initializer for UnrollLoopOptions to improve
readability.
Original implementation [D85605] by Nicolai Haehnle
<nicolai.haehnle at amd.com>.
Commit: afc7292626e193a2b09b81d227eac90428f0abe3
https://github.com/llvm/llvm-project/commit/afc7292626e193a2b09b81d227eac90428f0abe3
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SDPatternMatch.h
Log Message:
-----------
[SDPatternMatch] Do not use std::forward and rvalue references (NFC) (#93806)
The m_ZExtOrSelf() family of matchers currently incorrectly calls
std::forward twice on the same value. However, just removing those causes
other complications, because then template arguments get incorrectly
inferred to const references instead of the underlying value types.
Things become a mess.
Instead, just completely remove the use of std::forward and rvalue
references from SDPatternMatch. I don't think they really provide value
in this context, especially as they're not used consistently in the
first place.
Commit: c3c443bb41ab5eab6d954bcc051549104ff6c235
https://github.com/llvm/llvm-project/commit/c3c443bb41ab5eab6d954bcc051549104ff6c235
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sge-to-icmp-sle.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sgt-to-icmp-sgt.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sle-to-icmp-sle.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-slt-to-icmp-sgt.ll
M llvm/test/Transforms/InstCombine/icmp-and-lowbit-mask.ll
M llvm/test/Transforms/InstCombine/icmp-of-and-x.ll
Log Message:
-----------
[InstCombine] Add transforms `(icmp spred (and X, Y), X)` if `X` or `Y` are known signed/unsigned
Several transforms:
1) If known `Y < 0`:
- slt -> ult: https://alive2.llvm.org/ce/z/9zt2iK
- sle -> ule: https://alive2.llvm.org/ce/z/SPoPNF
- sgt -> ugt: https://alive2.llvm.org/ce/z/IGNxAk
- sge -> uge: https://alive2.llvm.org/ce/z/joqTvR
2) If known `Y >= 0`:
- `(X & PosY) s> X --> X s< 0`
- https://alive2.llvm.org/ce/z/7e-5BQ
- `(X & PosY) s> X --> X s< 0`
- https://alive2.llvm.org/ce/z/jvT4Gb
3) If known `X < 0`:
- `(NegX & Y) s> NegX --> Y s>= 0`
- https://alive2.llvm.org/ce/z/ApkaEh
- `(NegX & Y) s<= NegX --> Y s< 0`
- https://alive2.llvm.org/ce/z/oRnfHp
Closes #94417
Commit: 91825512d1eed67d90a000bec2a5a46f0d417c04
https://github.com/llvm/llvm-project/commit/91825512d1eed67d90a000bec2a5a46f0d417c04
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/test/CodeGen/ARM/vabd.ll
Log Message:
-----------
[ARM] vabd.ll - regenerate test checks
Cleanup for #94504
Commit: fb8421a04525a1e73c26d69a7ab5356f3ac1450d
https://github.com/llvm/llvm-project/commit/fb8421a04525a1e73c26d69a7ab5356f3ac1450d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/test/CodeGen/ARM/vaba.ll
Log Message:
-----------
[ARM] vaba.ll - regenerate test checks
Cleanup for #94504
Commit: a53ed2170aad4022ff6b730de3f7c63cc35c485d
https://github.com/llvm/llvm-project/commit/a53ed2170aad4022ff6b730de3f7c63cc35c485d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/test/MC/RISCV/relocations.s
Log Message:
-----------
[MC][RISCV] relocations.s - add missing opcode to test check
Commit: ea32197daa8517ff67c0691ad24d25eb5cf905f4
https://github.com/llvm/llvm-project/commit/ea32197daa8517ff67c0691ad24d25eb5cf905f4
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
A llvm/test/DebugInfo/X86/sdag-order.ll
Log Message:
-----------
[DebugInfo][SelectionDAG] Fix position of salvaged 'dangling' DBG_VALUEs (#94458)
`SelectionDAGBuilder::handleDebugValue` has a parameter `Order` which
represents the insert-at position for the new DBG_VALUE. Prior to this patch
`SelectionDAGBuilder::SDNodeOrder` is used instead of the `Order` parameter.
The only code-paths where `Order != SDNodeOrder` are the two calls calls to
`handleDebugValue` from `salvageUnresolvedDbgValue`.
`salvageUnresolvedDbgValue` is called from `resolveOrClearDbgInfo` and
`dropDanglingDebugInfo`. The former is called after SelectionDAG completes one
block.
Some dbg.values can't be lowered to DBG_VALUEs right away. These get recorded
as 'dangling' - their order-number is saved - and get salvaged later through
`dropDanglingDebugInfo`, or if we've still got dangling debug info once the
whole block has been emitted, through `resolveOrClearDbgInfo`. Their saved
order-number is passed to `handleDebugValue`.
Prior to this patch, DBG_VALUEs inserted using these functions are inserted at
the "current" `SDNodeOrder` rather than the intended position that is passed to
the function.
Fix and add test.
Commit: f1e78f776908f2bc1759eae25381f576f62728a2
https://github.com/llvm/llvm-project/commit/f1e78f776908f2bc1759eae25381f576f62728a2
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/CodeGenCXX/template-param-objects-linkage.cpp
Log Message:
-----------
[clang][Interp] Handle lvalue APValues in visitAPValueInitializer()
Commit: c2e62c745996cbd4e19ac1ffcafc849960377b57
https://github.com/llvm/llvm-project/commit/c2e62c745996cbd4e19ac1ffcafc849960377b57
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/test/tools/llvm-reduce/remove-debug-info-nodes.ll
M llvm/tools/llvm-reduce/deltas/ReduceDIMetadata.cpp
Log Message:
-----------
[llvm-reduce] Remove DIGlobalVariableExpressions from DICompileUnit's globals (#94497)
The 'metadata' delta pass will remove !dbg attachments from globals (which are
DIGlobalVariableExpression nodes). The DIGlobalVariableExpressions don't get
eliminated from the IR however if they are still referenced by the globals
field in DICompileUnit.
Teach the 'di-metadata' pass to try removing global variable operands from
metadata tuples as well as DINodes.
Commit: 6c9bce88a876f48eb8ab4df172bb86375b29a87f
https://github.com/llvm/llvm-project/commit/6c9bce88a876f48eb8ab4df172bb86375b29a87f
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M flang/lib/Lower/OpenMP/DataSharingProcessor.h
M flang/test/Lower/OpenMP/critical.f90
Log Message:
-----------
[flang][OpenMP] Fix privatization when critical is present (#94441)
When a critical construct is present inside another construct where
privatizations may occur, such as a parallel construct, some
privatizations are skipped if the corresponding symbols are defined
inside the critical section only (see the example below).
This happens because, while critical constructs have a "body", they
don't have a separate scope (which makes sense, since no
privatizations can occur in them). Because of this, in semantics
phase, it's not possible to insert a new host association symbol,
but instead the symbol from the enclosing context is used directly.
This makes symbol collection in DataSharingProcessor consider the
new symbol to be defined by the critical construct, instead of by
the enclosing one, which causes the privatization to be skipped.
Example:
```
!$omp parallel default(firstprivate)
!$omp critical
i = 200
!$omp end critical
!$omp end parallel
```
This patch fixes this by identifying constructs where
privatizations may not happen and skipping them during the
collection of nested symbols. Currently, this seems to happen only
with critical constructs, but others can be easily added to the
skip list, if needed.
Fixes https://github.com/llvm/llvm-project/issues/75767
Commit: 7091dfc0e49b8c79f9e1daf6ab0ca0e65f30f347
https://github.com/llvm/llvm-project/commit/7091dfc0e49b8c79f9e1daf6ab0ca0e65f30f347
Author: Vassil Vassilev <v.g.vassilev at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Parse/ParseStmt.cpp
A clang/test/Interpreter/pretty-print.c
Log Message:
-----------
[clang-repl] Lay the foundation of pretty printing for C. (#89811)
Commit: d3f8eab0accfdddc897aea61763ef57dbc83ee30
https://github.com/llvm/llvm-project/commit/d3f8eab0accfdddc897aea61763ef57dbc83ee30
Author: Kai Luo <lkail at cn.ibm.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
A llvm/test/CodeGen/PowerPC/tocdata-firm-alignment.ll
Log Message:
-----------
[PowerPC] Add test to show alignment of toc-data symbol is changed. NFC.
After O3 opt pipeline, the alignment of toc-data symbol is changed which is
unexpected.
Commit: a6cc363b2743a264eb06e46cac05c3c9c92e3ef7
https://github.com/llvm/llvm-project/commit/a6cc363b2743a264eb06e46cac05c3c9c92e3ef7
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M lldb/test/API/tools/lldb-server/TestPtyServer.py
Log Message:
-----------
[lldb] Disable TestPtyServer API test when remote testing (#94587)
The local PTY is not available for the remotely executed lldb-server to
pass the test. Also, in general, we cannot execute the local lldb-server
instance because it could be compiled for the different system/cpu
target.
Commit: 0f38b4d1ca026f1c28e5a75adab00173852234dd
https://github.com/llvm/llvm-project/commit/0f38b4d1ca026f1c28e5a75adab00173852234dd
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
A llvm/test/CodeGen/ARM/neon_vabd.ll
Log Message:
-----------
[ARM] Add neon_vabd.ll based off aarch64 tests
Test coverage for #94504
Commit: 03a2fe9a7574c0cff724666e713dead7009a9621
https://github.com/llvm/llvm-project/commit/03a2fe9a7574c0cff724666e713dead7009a9621
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAG] visitSUB - update the ABS matching code to use SDPatternMatch and hasOperation.
Avoids the need to explicitly test both commuted variants and doesn't match custom lowering after legalization.
Cleanup for #94504
Commit: fdcdc3d759224f0ec0a3e472f7940d4b0f3a1b79
https://github.com/llvm/llvm-project/commit/fdcdc3d759224f0ec0a3e472f7940d4b0f3a1b79
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/CLOptions.inc
M flang/lib/Optimizer/Transforms/ExternalNameConversion.cpp
Log Message:
-----------
[flang][CodeGen][NFC] Reduce boilerplatre for ExternalNameConversion (#94474)
Use tablegen to generate the pass constructor.
I removed the duplicated pass option handling. I don't understand why
the manual instantiation of the pass needs its own duplicate of the pass
options in the (automatically generated) base class (even with the
option to ignore the pass options in the base class).
This pass doesn't need changes to support other top level operations.
Commit: bf02f81da743e60a5c51fc8f5ff43d57cf6db407
https://github.com/llvm/llvm-project/commit/bf02f81da743e60a5c51fc8f5ff43d57cf6db407
Author: Kai Luo <lkail at cn.ibm.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCFastISel.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/test/CodeGen/PowerPC/toc-data-common.ll
M llvm/test/CodeGen/PowerPC/toc-data.ll
Log Message:
-----------
[PowerPC] Adjust operand order of ADDItoc to be consistent with other ADDI* nodes (#93642)
Simultaneously, the `ADDItoc` machineinstr is generated in
`PPCISelDAGToDAG::Select` so the pattern is not used and can be removed.
Commit: a86c1e7175d4acd8357326184bf4f88c8192676f
https://github.com/llvm/llvm-project/commit/a86c1e7175d4acd8357326184bf4f88c8192676f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/lib/AST/CMakeLists.txt
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/Context.cpp
M clang/lib/AST/Interp/Context.h
M clang/lib/AST/Interp/Descriptor.cpp
M clang/lib/AST/Interp/Disasm.cpp
M clang/lib/AST/Interp/Interp.cpp
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/InterpFrame.cpp
M clang/lib/AST/Interp/InterpStack.cpp
M clang/lib/AST/Interp/InterpStack.h
A clang/lib/AST/Interp/MemberPointer.cpp
A clang/lib/AST/Interp/MemberPointer.h
M clang/lib/AST/Interp/Opcodes.td
M clang/lib/AST/Interp/Pointer.cpp
M clang/lib/AST/Interp/Pointer.h
M clang/lib/AST/Interp/PrimType.cpp
M clang/lib/AST/Interp/PrimType.h
M clang/test/AST/Interp/eval-order.cpp
M clang/test/AST/Interp/literals.cpp
A clang/test/AST/Interp/memberpointers.cpp
M clang/test/CodeGenCXX/pointers-to-data-members.cpp
M clang/test/SemaCXX/attr-weak.cpp
M clang/test/SemaCXX/nullptr_in_arithmetic_ops.cpp
M clang/unittests/AST/Interp/toAPValue.cpp
Log Message:
-----------
[clang][Interp] Member Pointers (#91303)
This adds a `MemberPointer` class along with a `PT_MemberPtr` primitive
type.
A `MemberPointer` has a `Pointer` Base as well as a `Decl*` (could be
`ValueDecl*`?) decl it points to.
For the actual logic, this mainly changes the way we handle `PtrMemOp`s
in `VisitBinaryOperator`.
Commit: f5d8c0ebfe9f382f404607db404353af5467cec1
https://github.com/llvm/llvm-project/commit/f5d8c0ebfe9f382f404607db404353af5467cec1
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn
Log Message:
-----------
[gn build] Port a86c1e7175d4
Commit: 4c6dd70ec4fb7491eb59e3efa6d3080499a15d4d
https://github.com/llvm/llvm-project/commit/4c6dd70ec4fb7491eb59e3efa6d3080499a15d4d
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
Log Message:
-----------
[AMDGPU] Move INIT_EXEC lowering from SILowerControlFlow to SIWholeQuadMode (#94452)
NFCI; this just preserves SI_INIT_EXEC and SI_INIT_EXEC_FROM_INPUT
instructions a little longer so that we can reliably identify them in
SIWholeQuadMode.
Commit: 8516f54e6a984a79d1a988ec66a414b5cfbd7ec7
https://github.com/llvm/llvm-project/commit/8516f54e6a984a79d1a988ec66a414b5cfbd7ec7
Author: Jon Chesterfield <jonathanchesterfield at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/lib/CodeGen/Targets/AMDGPU.cpp
A clang/test/CodeGen/voidptr-vaarg.c
A clang/test/CodeGenCXX/inline-then-fold-variadics.cpp
M libc/config/gpu/entrypoints.txt
M libc/test/src/__support/CMakeLists.txt
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/InitializePasses.h
A llvm/include/llvm/Transforms/IPO/ExpandVariadics.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Transforms/IPO/CMakeLists.txt
A llvm/lib/Transforms/IPO/ExpandVariadics.cpp
A llvm/test/CodeGen/AMDGPU/expand-variadic-call.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/unsupported-calls.ll
A llvm/test/CodeGen/WebAssembly/expand-variadic-call.ll
A llvm/test/CodeGen/WebAssembly/vararg-frame.ll
A llvm/test/Transforms/ExpandVariadics/expand-va-intrinsic-split-linkage.ll
A llvm/test/Transforms/ExpandVariadics/expand-va-intrinsic-split-simple.ll
A llvm/test/Transforms/ExpandVariadics/indirect-calls.ll
A llvm/test/Transforms/ExpandVariadics/intrinsics.ll
A llvm/test/Transforms/ExpandVariadics/invoke.ll
A llvm/test/Transforms/ExpandVariadics/pass-byval-byref.ll
A llvm/test/Transforms/ExpandVariadics/pass-indirect.ll
A llvm/test/Transforms/ExpandVariadics/pass-integers.ll
Log Message:
-----------
[AMDGPU] Implement variadic functions by IR lowering (#93362)
This is a mostly-target-independent variadic function optimisation and
lowering pass. It is only enabled for AMDGPU in this initial commit.
The purpose is to make C style variadic functions a zero cost
abstraction. They are lowered to equivalent IR which is then amenable to
other optimisations. This is inherently slightly target specific but
much less so than one might expect - the C varargs interface heavily
constrains the ABI design divergence.
The pass is primarily tested from webassembly. This is because wasm has
a straightforward variadic lowering strategy which coincides exactly
with what this pass transforms code into and a struct passing convention
with few cases to check. Adding further targets conventions is
straightforward and elided from this patch primarily to simplify the
review. Implemented in other branches are Linux X86, AMD64, AArch64 and
NVPTX.
Testing for targets that have existing lowering for va_arg from clang is
most efficiently done by checking that clang | opt completely elides the
variadic syntax from test cases. The lowering produces a struct for each
call site which can be inspected to check the various alignment and
indirections are correct.
AMDGPU presently has no variadic support other than some ad hoc printf
handling. Combined with the pass being inactive on all other targets
landing this represents strict increase in capability with zero risk.
Testing and refining will continue post commit.
In addition to the compiler tests included here, a self contained x64
clang/musl toolchain was constructed using the "lowering" instead of the
systemv ABI and used to build various C programs like lua and libxml2.
Commit: 86295dc197db2f08f4eb582ed1026a8f74ac3338
https://github.com/llvm/llvm-project/commit/86295dc197db2f08f4eb582ed1026a8f74ac3338
Author: bgra8 <32298056+bgra8 at users.noreply.github.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/lib/AST/ParentMap.cpp
M clang/lib/Analysis/CFG.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/test/Analysis/cxx-uninitialized-object.cpp
M clang/test/Analysis/lifetime-extended-regions.cpp
Log Message:
-----------
Revert "[Analyzer][CFG] Correctly handle rebuilt default arg and default init expression (#91879)" (#94597)
This depends on https://github.com/llvm/llvm-project/pull/92527 which
needs to be reverted due to
https://github.com/llvm/llvm-project/pull/92527#issuecomment-2149120420.
This reverts commit 905b402a5d8f1490d668f40942390ebd6e87aa8f.
Co-authored-by: Bogdan Graur <bgraur at google.com>
Commit: 026fbdf934d4adc8b6abe544ba1bcfa3b64293ac
https://github.com/llvm/llvm-project/commit/026fbdf934d4adc8b6abe544ba1bcfa3b64293ac
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.h
M clang/test/AST/Interp/arrays.cpp
Log Message:
-----------
[clang][Interp] Handle one-past-the-end pointers in SubPtr
Commit: e2858189bd99e6914dc2f63ab55b053a74b4e58b
https://github.com/llvm/llvm-project/commit/e2858189bd99e6914dc2f63ab55b053a74b4e58b
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/AST/DeclID.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/Serialization/ModuleManager.h
M clang/lib/AST/DeclBase.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ModuleFile.cpp
R clang/test/Modules/no-transitive-decls-change.cppm
Log Message:
-----------
Revert "[serialization] no transitive decl change (#92083)"
This reverts commit 97c866f6c86456b3316006e6beff47e68a81c00a.
This fails on 32bit machines. See
https://github.com/llvm/llvm-project/pull/92083
Commit: 7f52e4c755fcd02232964f19bb0226878255f274
https://github.com/llvm/llvm-project/commit/7f52e4c755fcd02232964f19bb0226878255f274
Author: bgra8 <32298056+bgra8 at users.noreply.github.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/AST/ast-dump-default-init-json.cpp
M clang/test/AST/ast-dump-default-init.cpp
M clang/test/Analysis/lifetime-extended-regions.cpp
M clang/test/CXX/drs/cwg16xx.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/special/class.temporary/p6.cpp
M clang/test/SemaCXX/constexpr-default-arg.cpp
M clang/test/SemaCXX/cxx11-default-member-initializers.cpp
M clang/test/SemaCXX/eval-crashes.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
Revert "Reapply "[Clang][CWG1815] Support lifetime extension of temporary created by aggregate initialization using a default member initializer" (#92527)" (#94600)
Reverting due to
https://github.com/llvm/llvm-project/pull/92527#issuecomment-2149120420.
This reverts commit f049d72ac2bcc40fd91d4e95148658021fb24bf1.
Co-authored-by: Bogdan Graur <bgraur at google.com>
Commit: 64c8b66cc9972123c5f4aefe692c275898221aeb
https://github.com/llvm/llvm-project/commit/64c8b66cc9972123c5f4aefe692c275898221aeb
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/include/llvm/AsmParser/LLToken.h
M llvm/include/llvm/IR/CallingConv.h
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/Target/AArch64/AArch64CallingConvention.td
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/test/CodeGen/AArch64/sme-support-routines-calling-convention.ll
Log Message:
-----------
[AArch64][SME] Add calling convention for __arm_get_current_vg (#93963)
Adds a calling convention for calls to the `__arm_get_current_vg`
support
routine, which preserves X1-X15, X19-X29, SP, Z0-Z31 & P0-P15.
See https://github.com/ARM-software/abi-aa/pull/263
Commit: 3cdb1df39d1be54c219ef083a4d1bfe3c9ed4e19
https://github.com/llvm/llvm-project/commit/3cdb1df39d1be54c219ef083a4d1bfe3c9ed4e19
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/IPO/BUILD.gn
Log Message:
-----------
[gn build] Port 8516f54e6a98
Commit: 9b692e562dbe6a5c9cac3b438f755d83ab8e947b
https://github.com/llvm/llvm-project/commit/9b692e562dbe6a5c9cac3b438f755d83ab8e947b
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelperVectorOps.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/combine-vscale.mir
Log Message:
-----------
[GlobalIsel] Combine G_VSCALE (#94096)
We need them for scalable address calculation and
legal scalable addressing modes.
Commit: 4559d83b24a839e9309378e070c64623f04f1e49
https://github.com/llvm/llvm-project/commit/4559d83b24a839e9309378e070c64623f04f1e49
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Transforms/IPO/ExpandVariadics.cpp
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Port for 8516f54e6a984a79d1a988ec66a414b5cfbd7ec7
Remove some #includes in ExpandVariadics.cpp as it will cause layering
violations.
Commit: 574ab7e7b759a400ecf54c1141b1433bb2415e93
https://github.com/llvm/llvm-project/commit/574ab7e7b759a400ecf54c1141b1433bb2415e93
Author: Jon Chesterfield <jonathanchesterfield at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M libc/config/gpu/entrypoints.txt
M libc/test/src/__support/CMakeLists.txt
Log Message:
-----------
[libc] Disable varargs tests on gpu, nvptx can't build them yet
Commit: b3b9f8dd4cad55cf4106570af518c5075c2cdcee
https://github.com/llvm/llvm-project/commit/b3b9f8dd4cad55cf4106570af518c5075c2cdcee
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Transforms/IPO/ExpandVariadics.cpp
Log Message:
-----------
[Transforms] Fix -Wunused-variable in ExpandVariadics.cpp (NFC)
/llvm-project/llvm/lib/Transforms/IPO/ExpandVariadics.cpp:426:14:
error: unused variable 'OriginalFunctionIsDeclaration' [-Werror,-Wunused-variable]
const bool OriginalFunctionIsDeclaration = OriginalFunction->isDeclaration();
^
/llvm-project/llvm/lib/Transforms/IPO/ExpandVariadics.cpp:445:13:
error: unused variable 'VariadicWrapperDefine' [-Werror,-Wunused-variable]
Function *VariadicWrapperDefine =
^
2 errors generated.
Commit: 5fe7307146004c8e841b2340f075519be4a215ed
https://github.com/llvm/llvm-project/commit/5fe7307146004c8e841b2340f075519be4a215ed
Author: David Green <david.green at arm.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
M llvm/test/CodeGen/Thumb2/mve-tailpred-vptblock.ll
Log Message:
-----------
[ARM] Don't block tail-predication from unrelated VPT blocks. (#94239)
VPT blocks that do not produce an interesting 'output' (like a stored
value or reduction result), do not need to be predicated on vctp for the
whole loop to be tail-predicated. Just producing results for the valid
tail predication lanes should be enough.
Commit: 10dcba76545b8b8c58456ba99a572d53183c9d76
https://github.com/llvm/llvm-project/commit/10dcba76545b8b8c58456ba99a572d53183c9d76
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang-tools-extra/clang-tidy/misc/CMakeLists.txt
Log Message:
-----------
[clang-tidy] Remove redundant LINK_LIBS (#94588)
clangAnalysis is already being pulled in via
clang_target_link_libraries(). Also listing it in LINK_LIBS means that
we'll link both against the static libraries and the shared
libclang-cpp.so library if CLANG_LINK_CLANG_DYLIB is enabled, and waste
time on unnecessary LTO.
Commit: e040474f493d3392af3fbd4284bb1448a7eb4341
https://github.com/llvm/llvm-project/commit/e040474f493d3392af3fbd4284bb1448a7eb4341
Author: lntue <35648136+lntue at users.noreply.github.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
Log Message:
-----------
[libc][math] Temporarily disable nexttowardf16 on aarch64 due to clang-11 bug. (#94569)
The conversion between _Float16 and long double will crash clang-11 on
aarch64. This is fixed in clang-12: https://godbolt.org/z/8ceT9454c
Commit: 8725b672071f24721bee11caa767eed6e773fce7
https://github.com/llvm/llvm-project/commit/8725b672071f24721bee11caa767eed6e773fce7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[DAG] expandABS - add missing FREEZE in abs(x) -> smax(x,sub(0,x)) expansion
Noticed while working on #94601
Commit: b025d6913ef7160699e96f0d00820873807310c8
https://github.com/llvm/llvm-project/commit/b025d6913ef7160699e96f0d00820873807310c8
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/test/Lower/OpenMP/map-component-ref.f90
Log Message:
-----------
[flang][OpenMP] Make object identity more precise (#94495)
Derived type components may use a given `Symbol` regardless of what
parent objects they are a part of. Because of that, simply using a
symbol address is not sufficient to determine object identity.
Make the designator a part of the IdTy. To compare identities, when
symbols are equal (and non-null), compare the designators.
Commit: c5c530f4f900b5abfbea5c0f9c934161454773e7
https://github.com/llvm/llvm-project/commit/c5c530f4f900b5abfbea5c0f9c934161454773e7
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/lib/Sema/Scope.cpp
Log Message:
-----------
[clang][Sema] Add missing scope flags to Scope::dumpImpl (#94529)
There were a handlful of scope flags that were not handled in the dump
function, which would then lead to an assert.
Commit: 41d73504c95342410ac954774b9583be73c97bf9
https://github.com/llvm/llvm-project/commit/41d73504c95342410ac954774b9583be73c97bf9
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
A llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit.ll
Log Message:
-----------
[ConstraintElim] Add set of tests where a loop iv is used in exit.
Test cases inspired by
https://github.com/llvm/llvm-project/issues/90417.
Commit: d075b7bbace8c0ef983ea6f9aad175bec3ede729
https://github.com/llvm/llvm-project/commit/d075b7bbace8c0ef983ea6f9aad175bec3ede729
Author: WÁNG Xuěruì <git at xen0n.name>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
A llvm/test/CodeGen/LoongArch/fp16-promote.ll
Log Message:
-----------
[LoongArch] Allow f16 codegen with expansion to libcalls (#94456)
The test case is adapted from llvm/test/CodeGen/RISCV/fp16-promote.ll,
because it covers some more IR patterns that ought to be common.
Fixes #93894
Commit: e49f902358ca03b1f11bc43b2eb5306078191622
https://github.com/llvm/llvm-project/commit/e49f902358ca03b1f11bc43b2eb5306078191622
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M .github/workflows/containers/github-action-ci/stage1.Dockerfile
Log Message:
-----------
[workflows] Add scan-build to ci-ubuntu-22.04 container (#94543)
This will be used for a new CI job that runs the static analyzer.
Commit: e5c93ed3482d483bb5d2876a296cbe603d23d0e8
https://github.com/llvm/llvm-project/commit/e5c93ed3482d483bb5d2876a296cbe603d23d0e8
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAMX.td
M llvm/lib/Target/X86/X86LowerTileCopy.cpp
M llvm/lib/Target/X86/X86MachineFunctionInfo.h
Log Message:
-----------
[X86][AMX] Checking AMXProgModel in X86LowerTileCopy (#94358)
This fixes compile time regression after #93692.
Commit: 435aa7663d56e7216ad148ede3a422675b5f2be1
https://github.com/llvm/llvm-project/commit/435aa7663d56e7216ad148ede3a422675b5f2be1
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M offload/include/PluginManager.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/host/src/rtl.cpp
M offload/src/PluginManager.cpp
M offload/src/omptarget.cpp
Log Message:
-----------
[Libomptarget] Rework device initialization and image registration (#93844)
Summary:
Currently, we register images into a linear table according to the
logical OpenMP device identifier. We then initialize all of these images
as one block. This logic requires that images are compatible with *all*
devices instead of just the one that it can run on. This prevents us
from running on systems with heterogeneous devices (i.e. image 1 runs on
device 0 image 0 runs on device 1).
This patch reworks the logic by instead making the compatibility check a
per-device query. We then scan every device to see if it's compatible
and do it as they come.
Commit: 24a39f364dbef7e18d36be3919eacde32125df5e
https://github.com/llvm/llvm-project/commit/24a39f364dbef7e18d36be3919eacde32125df5e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Target/X86/X86SchedIceLake.td
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx2.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-ssse3.s
Log Message:
-----------
[X86] Fix pipe resources for HADD/SUB instructions
IceLakeServer was copying these from SkylakeServer, but integer HADD/SUB can now run on an extra port
Commit: 62e2eb2154cac79db20012287823abbf35de8cb4
https://github.com/llvm/llvm-project/commit/62e2eb2154cac79db20012287823abbf35de8cb4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Target/X86/X86SchedIceLake.td
M llvm/lib/Target/X86/X86SchedSkylakeServer.td
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-sse3.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-sse3.s
Log Message:
-----------
[X86] Fix pipe resources for FP HADD/SUB instructions
IceLakeServer/SkylakeServer can only use Port01 for the FADD/FSUB stage
Confirmed with uops.info + Agner
Commit: 170d45c0eb018744ab94e3baa96af6ab74c92bfc
https://github.com/llvm/llvm-project/commit/170d45c0eb018744ab94e3baa96af6ab74c92bfc
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/test/SemaOpenCL/builtins-amdgcn-gfx940-err.cl
Log Message:
-----------
[Clang][AMDGPU] Use `I` to decorate imm argument for `__builtin_amdgcn_global_load_lds` (#94376)
Commit: 31442c9669ca234ab71294125f484882b1cef9d4
https://github.com/llvm/llvm-project/commit/31442c9669ca234ab71294125f484882b1cef9d4
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M libc/config/gpu/entrypoints.txt
M libc/test/src/__support/CMakeLists.txt
Log Message:
-----------
[libc] Enable varargs tests for AMDGPU targets
Summary:
This reverts commit 574ab7e7b759a400ecf54c1141b1433bb2415e93.
Commit: 435addbf5088be14b1b7e0398ecd16501dbf4498
https://github.com/llvm/llvm-project/commit/435addbf5088be14b1b7e0398ecd16501dbf4498
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/test/CodeGenCUDA/cuda-builtin-vars.cu
M llvm/lib/Target/NVPTX/NVPTX.h
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/lib/Target/NVPTX/NVVMIntrRange.cpp
A llvm/test/CodeGen/NVPTX/intr-range.ll
M llvm/test/CodeGen/NVPTX/intrinsic-old.ll
Log Message:
-----------
[NVPTX] Revamp NVVMIntrRange pass (#94422)
Revamp the NVVMIntrRange pass making the following updates:
- Use range attributes over range metadata. This is what instcombine has
move to for ranges on intrinsics in
https://github.com/llvm/llvm-project/pull/88776 and it seems a bit
cleaner.
- Consider the `!"maxntid{x,y,z}"` and `!"reqntid{x,y,z}"` function
metadata when adding ranges for `tid` srge instrinsics. This can allow
for smaller ranges and more optimization.
- When range attributes are already present, use the intersection of the
old and new range. This complements the metadata change by allowing
ranges to be shrunk when an intrinsic is in a function which is inlined
into a kernel with metadata. While we don't call this more then once
yet, we should consider adding a second call after inlining, once this
has had a chance to soak for a while and no issues have arisen.
I've also re-enabled this pass in the TM, it was disabled years ago due
to "numerical discrepancies" https://reviews.llvm.org/D96166. In our
testing we haven't seen any issues with adding ranges to intrinsics, and
I cannot find any further info about what issues were encountered.
Commit: a97871e07dd62510dea1bb71b0f74261f52e4479
https://github.com/llvm/llvm-project/commit/a97871e07dd62510dea1bb71b0f74261f52e4479
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/math/BUILD.bazel
Log Message:
-----------
[bazel] Fix layering check violation for nextafter_test_template target for 63cda2d
Commit: e16f2f5d2491fde19afb63d5cec83625d391be30
https://github.com/llvm/llvm-project/commit/e16f2f5d2491fde19afb63d5cec83625d391be30
Author: Graham Hunter <graham.hunter at arm.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/test/CodeGen/AArch64/arm64-2011-10-18-LdStOptBug.ll
M llvm/test/CodeGen/AArch64/arm64-ldp-cluster.ll
M llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions-predicated-scalable.ll
M llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions-scalable.ll
M llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions.ll
M llvm/test/CodeGen/AArch64/zext-to-tbl.ll
M llvm/test/Transforms/LoopStrengthReduce/AArch64/lsr-reuse.ll
Log Message:
-----------
[AArch64] Override isLSRCostLess, take number of instructions into account (#84189)
Adds an AArch64-specific version of isLSRCostLess, changing the relative
importance of the various terms from the formulae being evaluated.
This has been split out from my vscale-aware LSR work, see the RFC for
reference:
https://discourse.llvm.org/t/rfc-vscale-aware-loopstrengthreduce/77131
Commit: 79393124ff74aaaf6a43f7c88e67fd76a6e44239
https://github.com/llvm/llvm-project/commit/79393124ff74aaaf6a43f7c88e67fd76a6e44239
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/lib/Sema/SemaAMDGPU.cpp
Log Message:
-----------
Fix -Wunused-variable in SemaAMDGPU.cpp in release build, NFC
Commit: 00089f963fa333932126dd289aa2fabbb1c19f78
https://github.com/llvm/llvm-project/commit/00089f963fa333932126dd289aa2fabbb1c19f78
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVVMIntrRange.cpp
Log Message:
-----------
[NVPTX] Remove unused private field in NVVMIntrRange.cpp (NFC)
/llvm-project/llvm/lib/Target/NVPTX/NVVMIntrRange.cpp:33:12:
error: private field 'SmVersion' is not used [-Werror,-Wunused-private-field]
unsigned SmVersion;
^
1 error generated.
Commit: d9e6a563206cea4e682d4c52eccf24178d7d8343
https://github.com/llvm/llvm-project/commit/d9e6a563206cea4e682d4c52eccf24178d7d8343
Author: Marianne Mailhot-Sarrasin <32456002+mariannems at users.noreply.github.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M lldb/source/Target/ThreadPlanStepOverRange.cpp
Log Message:
-----------
[lldb] Fix ThreadPlanStepOverRange name in log message (#94611)
Co-authored-by: Marianne Mailhot-Sarrasin <marianne.mailhot-sarrasin at octasic.com>
Commit: ff77f67c47b7f06334110b5d7d4b9350288832ba
https://github.com/llvm/llvm-project/commit/ff77f67c47b7f06334110b5d7d4b9350288832ba
Author: Joachim <jenke at itc.rwth-aachen.de>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M openmp/CMakeLists.txt
Log Message:
-----------
[OpenMP][NFC] Fix warning for OpenMP standalone build (#93463)
PR #75125 introduced upward propagation of some OMPT-related CMake
variables.
For stand-alone builds this results in a warning that `SCOPE_PARENT` has
no meaning in a top-level directory.
Commit: 2ec47e5e85f9c0e68eaeb7041bb9aa783bfb97d3
https://github.com/llvm/llvm-project/commit/2ec47e5e85f9c0e68eaeb7041bb9aa783bfb97d3
Author: Gábor Spaits <gaborspaits1 at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/merge-unmerge-rv32.mir
Log Message:
-----------
[RISCV] Fix duplicate test cases for G_UNMERGE_VALUES (#94622)
`unmerge_i64` and `unmerge_i32` were exactly the same test cases. This
PR would fix that, so `unmerge_i32` would actually unmerge a 32 bit
value into two 16 bit values.
Commit: a9205c5c9d5aeadbb97ed7283a35515df4ba49da
https://github.com/llvm/llvm-project/commit/a9205c5c9d5aeadbb97ed7283a35515df4ba49da
Author: Spenser Bauman <sbauman at mathworks.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M mlir/include/mlir/Dialect/Tensor/TransformOps/TensorTransformOps.td
M mlir/include/mlir/Dialect/Tensor/Transforms/Transforms.h
M mlir/lib/Dialect/Tensor/TransformOps/TensorTransformOps.cpp
M mlir/lib/Dialect/Tensor/Transforms/RewriteAsConstant.cpp
M mlir/lib/Dialect/Utils/IndexingUtils.cpp
M mlir/test/Dialect/Tensor/rewrite-as-constant.mlir
Log Message:
-----------
[mlir][tensor] Implement constant folder for tensor.pad (#92691)
Extend the folding ability of the RewriteAsConstant patterns to include
tensor.pad operations on constants. The new pattern with constant fold
tensor.pad operations which operate on tensor constants and have
statically resolvable padding sizes/values.
%init = arith.constant dense<[[6, 7], [8, 9]]> : tensor<2x2xi32>
%pad_value = arith.constant 0 : i32
%0 = tensor.pad %init low[1, 1] high[1, 1] {
^bb0(%arg1: index, %arg2: index):
tensor.yield %pad_value : i32
} : tensor<2x2xi32> to tensor<4x4xi32>
becomes
%cst = arith.constant dense<[[0, 0, 0, 0],
[0, 6, 7, 0],
[0, 8, 9, 0],
[0, 0, 0, 0]]> : tensor<4x4xi32>
Co-authored-by: Spenser Bauman <sabauma at fastmail>
Commit: 2a6efe6a49e00a1953d537816a39e5c9883dc3c0
https://github.com/llvm/llvm-project/commit/2a6efe6a49e00a1953d537816a39e5c9883dc3c0
Author: Sayhaan Siddiqui <49014204+sayhaan at users.noreply.github.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
A bolt/include/bolt/Core/GDBIndex.h
M bolt/lib/Core/CMakeLists.txt
A bolt/lib/Core/GDBIndex.cpp
Log Message:
-----------
[BOLT][DWARF][NFC] Refactor GDB Index into a new file (#94405)
Create a new class and file for functions that update GDB index.
Commit: 6b9753a0ecf7fdea203c6faf23c3ad4bf432273c
https://github.com/llvm/llvm-project/commit/6b9753a0ecf7fdea203c6faf23c3ad4bf432273c
Author: Wei Zhao <60720283+wxz2020 at users.noreply.github.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
A clang/test/Driver/aarch64-oryon-1.c
M clang/test/Misc/target-invalid-cpu-note.c
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64Processors.td
A llvm/lib/Target/AArch64/AArch64SchedOryon.td
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/unittests/TargetParser/Host.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AArch64] Add support for Qualcomm Oryon processor (#91022)
Oryon is an ARM V8 AArch64 CPU from Qualcomm.
---------
Co-authored-by: Wei Zhao <wezhao at qti.qualcomm.com>
Commit: 505cd125a1edad4e59776e03e9a755aa598ed6f2
https://github.com/llvm/llvm-project/commit/505cd125a1edad4e59776e03e9a755aa598ed6f2
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/test/CodeGen/SPIRV/event-wait-ptr-type.ll
M llvm/test/CodeGen/SPIRV/passes/SPIRVEmitIntrinsics-no-duplicate-spv_assign_type.ll
A llvm/test/CodeGen/SPIRV/transcoding/OpGroupAsyncCopy-strided.ll
M llvm/test/CodeGen/SPIRV/transcoding/check_ro_qualifier.ll
Log Message:
-----------
[SPIR-V] Add validation to the test case with get_image_array_size/get_image_dim calls (#94467)
This PR is to add validation to the test case with
get_image_array_size/get_image_dim calls
(transcoding/check_ro_qualifier.ll). This test case didn't pass
validation because of invalid emission of OpCompositeExtract instruction
(Result Type must be the same type as Composite.).
In order to fix the problem this PR improves type inference in general
and partially addresses issues:
* https://github.com/llvm/llvm-project/issues/91998
* https://github.com/llvm/llvm-project/issues/91997
A reproducer from the description of the latter issue is added as a new
test case as a part of this PR.
Commit: b7b8d028962e7a7280e3d65019345f2446785e7e
https://github.com/llvm/llvm-project/commit/b7b8d028962e7a7280e3d65019345f2446785e7e
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit.ll
Log Message:
-----------
[ConstraintElim] Add induction tests with different start values.
Extra tests for https://github.com/llvm/llvm-project/pull/94610.
Commit: 083a26682d1c4d2d6efb051cb2f658564eaa32ff
https://github.com/llvm/llvm-project/commit/083a26682d1c4d2d6efb051cb2f658564eaa32ff
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/lib/AST/Interp/Function.cpp
Log Message:
-----------
[clang][Interp][NFC] Return a valid SourceInfo for Function PCs
We already assert that the given PC is in range and that the
function has a body, so the SrcMap should generally never be empty.
However, when generating destructors, we create quite a few instructions
for which we have no source information, which may cause the previous
assertion to fail. Return the end of the source map in this case.
Commit: 84b026690ded7f7728b6d1ba48b233b6ca8317eb
https://github.com/llvm/llvm-project/commit/84b026690ded7f7728b6d1ba48b233b6ca8317eb
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/AArch64/vecreduce-fmax-legalization.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmin-legalization.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/WebAssembly/simd-arith.ll
Log Message:
-----------
DAG: Pass flags to FoldConstantArithmetic (#93663)
There is simply way too much going on inside getNode. The complicated
constant folding of vector handling works by looking for build_vector
operands, and then tries to getNode the scalar element and then checks
if
constants were the result. As a side effect, this produces unused scalar
operation nodes (previously, without flags). If the vector operation
were later scalarized, it would find the flagless constant folding
temporary and lose the flag. I don't think this is a reasonable way for
constant folding to operate, but for now fix this by ensuring flags
on the original operation are preserved in the temporary.
This yields a clear code improvement for AMDGPU when f16 isn't legal.
The Wasm cases switch from using a libcall to compare and select. We are
evidently
missing the fcmp+select to fminimum/fmaximum handling, but this would be
further
improved when that's handled. AArch64 also avoids the libcall, but looks
worse and
has a different call for some reason.
Commit: 554a2fa4b2b18c81dc7f47599c4704577eb3a129
https://github.com/llvm/llvm-project/commit/554a2fa4b2b18c81dc7f47599c4704577eb3a129
Author: Sam Clegg <sbc at chromium.org>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/MC/WasmObjectWriter.cpp
M llvm/test/MC/WebAssembly/reloc-pic64.s
Log Message:
-----------
[WebAssembly] Fix element segments in wasm64 object files (#94617)
Followup to #94487
Commit: 2df68e0503d1cc8cc5e16f4370f2262ff05f2d2d
https://github.com/llvm/llvm-project/commit/2df68e0503d1cc8cc5e16f4370f2262ff05f2d2d
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M mlir/lib/IR/AsmPrinter.cpp
M mlir/test/IR/array-of-attr.mlir
Log Message:
-----------
[MLIR] Fix generic assembly syntax for ArrayAttr containing hex float (#94583)
When a float attribute is printed with Hex, we should not elide the type
because it is parsed back as i64 otherwise.
Commit: 7ef83f5561b34ca07fdef23ca2b3c01c583dbbf5
https://github.com/llvm/llvm-project/commit/7ef83f5561b34ca07fdef23ca2b3c01c583dbbf5
Author: Max191 <44243577+Max191 at users.noreply.github.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/Transforms/PackAndUnpackPatterns.cpp
M mlir/test/Dialect/Tensor/fold-into-pack-and-unpack.mlir
Log Message:
-----------
[mlir] Add pack/unpack transpose foldings for linalg.generic ops, fix bugs (#93055)
This PR adds transpose + pack/unpack folding support for transpose ops
in the form of `linalg.generic` ops. There were also some bugs with the
permutation composing in the previous patterns, so this PR fixes these
bugs and adds tests for them as well.
Commit: 61ef9fdd14f0e7aec2e7dcc10fddd30eec52ee16
https://github.com/llvm/llvm-project/commit/61ef9fdd14f0e7aec2e7dcc10fddd30eec52ee16
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/utils/gn/secondary/bolt/lib/Core/BUILD.gn
Log Message:
-----------
[gn build] Port 2a6efe6a49e0
Commit: 23d86165aabe351aae967301a4ba7d3781f5fb61
https://github.com/llvm/llvm-project/commit/23d86165aabe351aae967301a4ba7d3781f5fb61
Author: Adam Paszke <adam.paszke at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Bazel] Generate LLVM_HAS_XYZ_TARGET macros in llvm config (#94476)
Otherwise code that depends on those targets being enabled might not get
compiled correctly even if the targets are explicitly included in the
configuration (in my case NVVM target for MLIR).
Commit: c0a8fb2120c6cf1e3006d6cc45eccef6fb5069f5
https://github.com/llvm/llvm-project/commit/c0a8fb2120c6cf1e3006d6cc45eccef6fb5069f5
Author: aengelke <engelke at in.tum.de>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineFunction.h
Log Message:
-----------
[CodeGen] Use std::bitset for MachineFunctionProperties (#94627)
The size of the properties is fixed, so no need for a BitVector.
Assigning small, fixed-size bitsets is faster.
It's a minor performance improvement.
Commit: ac5e278067033636d51bbee41a6ddb9869d0455b
https://github.com/llvm/llvm-project/commit/ac5e278067033636d51bbee41a6ddb9869d0455b
Author: aengelke <engelke at in.tum.de>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Target/X86/X86LowerAMXType.cpp
Log Message:
-----------
[X86] Skip AMX type lowering when AMX is not used (#92910)
The pass iterates over the IR multiple times, but most code doesn't use
AMX. Therefore, do a single iteration in advance to check whether a
function uses AMX at all, and exit early if it doesn't. This makes the
function-has-AMX path slightly more expensive, but AMX users probably
care a lot less about compile time than JIT users (which tend to not use
AMX).
For us, it reduces the time spent in this pass from 0.62% to 0.12%.
Ideally, we wouldn't even need to iterate over the function to determine
that it doesn't use AMX.
Commit: 5be0d00daa5737b6d2165d0c3ec29ce8af068053
https://github.com/llvm/llvm-project/commit/5be0d00daa5737b6d2165d0c3ec29ce8af068053
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
Log Message:
-----------
RegisterCoalescer: Remove unnecessary maybe_unused
2214026e957397cc6385f778b28d570485a31856 didn't fix an unused variable
warning correctly.
Commit: 3c6d004068a8b7ff036edab6dbbba7ccc2786dae
https://github.com/llvm/llvm-project/commit/3c6d004068a8b7ff036edab6dbbba7ccc2786dae
Author: OverMighty <its.overmighty at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/math/smoke/FMaxTest.h
M libc/test/src/math/smoke/FMinTest.h
Log Message:
-----------
[libc][math][c23] Fix implicit conversion in smoke tests for {fmax,fmin}f16 (#94624)
Commit: dd1cd02a438dc372e1f8457096d01fabb93c9ced
https://github.com/llvm/llvm-project/commit/dd1cd02a438dc372e1f8457096d01fabb93c9ced
Author: OverMighty <its.overmighty at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/c23.rst
M libc/docs/math/index.rst
M libc/spec/stdc.td
M libc/src/math/CMakeLists.txt
A libc/src/math/fmaximum_mag_numf16.h
A libc/src/math/fmaximum_magf16.h
A libc/src/math/fmaximum_numf16.h
A libc/src/math/fmaximumf16.h
A libc/src/math/fminimum_mag_numf16.h
A libc/src/math/fminimum_magf16.h
A libc/src/math/fminimum_numf16.h
A libc/src/math/fminimumf16.h
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/fmaximum_mag_numf16.cpp
A libc/src/math/generic/fmaximum_magf16.cpp
A libc/src/math/generic/fmaximum_numf16.cpp
A libc/src/math/generic/fmaximumf16.cpp
A libc/src/math/generic/fminimum_mag_numf16.cpp
A libc/src/math/generic/fminimum_magf16.cpp
A libc/src/math/generic/fminimum_numf16.cpp
A libc/src/math/generic/fminimumf16.cpp
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/math/smoke/FMaximumMagNumTest.h
M libc/test/src/math/smoke/FMaximumMagTest.h
M libc/test/src/math/smoke/FMaximumNumTest.h
M libc/test/src/math/smoke/FMaximumTest.h
M libc/test/src/math/smoke/FMinimumMagNumTest.h
M libc/test/src/math/smoke/FMinimumMagTest.h
M libc/test/src/math/smoke/FMinimumNumTest.h
M libc/test/src/math/smoke/FMinimumTest.h
A libc/test/src/math/smoke/fmaximum_mag_numf16_test.cpp
A libc/test/src/math/smoke/fmaximum_magf16_test.cpp
A libc/test/src/math/smoke/fmaximum_numf16_test.cpp
A libc/test/src/math/smoke/fmaximumf16_test.cpp
A libc/test/src/math/smoke/fminimum_mag_numf16_test.cpp
A libc/test/src/math/smoke/fminimum_magf16_test.cpp
A libc/test/src/math/smoke/fminimum_numf16_test.cpp
A libc/test/src/math/smoke/fminimumf16_test.cpp
Log Message:
-----------
[libc][math][c23] Add {fmaximum,fminimum}{,_mag,_mag_num,_num} C23 math functions (#94510)
#93566
Commit: a71aecb05fb8021edb9a12d865ae07a20532347e
https://github.com/llvm/llvm-project/commit/a71aecb05fb8021edb9a12d865ae07a20532347e
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
Log Message:
-----------
[llvm][ScheduleDAG] Set a fixed size for Sched::Preference (#94523)
This trims off 8 bytes from llvm::SUnit:
```
--- before 2024-06-05 12:13:00
+++ after 2024-06-05 12:12:58
@@ -1,65 +1,65 @@
*** Dumping AST Record Layout
0 | class llvm::SUnit
0 | SDNode * Node
8 | MachineInstr * Instr
16 | SUnit * OrigNode
24 | const MCSchedClassDesc * SchedClass
32 | class llvm::SmallVector<class llvm::SDep, 4> Preds
32 | class llvm::SmallVectorImpl<class llvm::SDep> (base)
32 | class llvm::SmallVectorTemplateBase<class llvm::SDep> (base)
32 | class llvm::SmallVectorTemplateCommon<class llvm::SDep> (base)
32 | class llvm::SmallVectorBase<uint32_t> (base)
32 | void * BeginX
40 | unsigned int Size
44 | unsigned int Capacity
48 | struct llvm::SmallVectorStorage<class llvm::SDep, 4> (base)
48 | char[64] InlineElts
112 | class llvm::SmallVector<class llvm::SDep, 4> Succs
112 | class llvm::SmallVectorImpl<class llvm::SDep> (base)
112 | class llvm::SmallVectorTemplateBase<class llvm::SDep> (base)
112 | class llvm::SmallVectorTemplateCommon<class llvm::SDep> (base)
112 | class llvm::SmallVectorBase<uint32_t> (base)
112 | void * BeginX
120 | unsigned int Size
124 | unsigned int Capacity
128 | struct llvm::SmallVectorStorage<class llvm::SDep, 4> (base)
128 | char[64] InlineElts
192 | unsigned int NodeNum
196 | unsigned int NodeQueueId
200 | unsigned int NumPreds
204 | unsigned int NumSuccs
208 | unsigned int NumPredsLeft
212 | unsigned int NumSuccsLeft
216 | unsigned int WeakPredsLeft
220 | unsigned int WeakSuccsLeft
224 | unsigned short NumRegDefsLeft
226 | unsigned short Latency
228:0-0 | _Bool isVRegCycle
228:1-1 | _Bool isCall
228:2-2 | _Bool isCallOp
228:3-3 | _Bool isTwoAddress
228:4-4 | _Bool isCommutable
228:5-5 | _Bool hasPhysRegUses
228:6-6 | _Bool hasPhysRegDefs
228:7-7 | _Bool hasPhysRegClobbers
229:0-0 | _Bool isPending
229:1-1 | _Bool isAvailable
229:2-2 | _Bool isScheduled
229:3-3 | _Bool isScheduleHigh
229:4-4 | _Bool isScheduleLow
229:5-5 | _Bool isCloned
229:6-6 | _Bool isUnbuffered
229:7-7 | _Bool hasReservedResource
- 232 | Sched::Preference SchedulingPref
- 236:0-0 | _Bool isDepthCurrent
- 236:1-1 | _Bool isHeightCurrent
- 240 | unsigned int Depth
- 244 | unsigned int Height
- 248 | unsigned int TopReadyCycle
- 252 | unsigned int BotReadyCycle
- 256 | const TargetRegisterClass * CopyDstRC
- 264 | const TargetRegisterClass * CopySrcRC
- | [sizeof=272, dsize=272, align=8,
- | nvsize=272, nvalign=8]
+ 230 | Sched::Preference SchedulingPref
+ 231:0-0 | _Bool isDepthCurrent
+ 231:1-1 | _Bool isHeightCurrent
+ 232 | unsigned int Depth
+ 236 | unsigned int Height
+ 240 | unsigned int TopReadyCycle
+ 244 | unsigned int BotReadyCycle
+ 248 | const TargetRegisterClass * CopyDstRC
+ 256 | const TargetRegisterClass * CopySrcRC
+ | [sizeof=264, dsize=264, align=8,
+ | nvsize=264, nvalign=8]
```
Commit: df168427b314f057c739eaccb21f361d3628f03b
https://github.com/llvm/llvm-project/commit/df168427b314f057c739eaccb21f361d3628f03b
Author: David Tenty <daltenty at ibm.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M libcxx/test/std/experimental/simd/simd.class/simd_copy.pass.cpp
Log Message:
-----------
[NFC][libc++][test][AIX] fix SIMD test XFAIL for clang before 19 (#94509)
058e4454 added an XFAIL for this test on AIX because of a backend
limitation. That backend limitation
has been resolved by 0295c2ad and will be available for clang 19, so we
should update the test to
limit the XFAIL to clang versions before that.
Commit: 09f19c7396ecf26623d08c4288b35a60e950fcd8
https://github.com/llvm/llvm-project/commit/09f19c7396ecf26623d08c4288b35a60e950fcd8
Author: jensmassberg <87519353+jensmassberg at users.noreply.github.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/unittests/Support/VirtualFileSystemTest.cpp
Log Message:
-----------
[clang] Fix handling of adding a file with the same name as an existing dir to VFS (#94461)
When trying to add a file to clang's VFS via `addFile` and a directory
of the same name already exists, we run into a [out-of-bound
access](https://github.com/llvm/llvm-project/blob/145815c180fc82c5a55bf568d01d98d250490a55/llvm/lib/Support/Path.cpp#L244).
The problem is that the file name is [recognised as existing path](
https://github.com/llvm/llvm-project/blob/145815c180fc82c5a55bf568d01d98d250490a55/llvm/lib/Support/VirtualFileSystem.cpp#L896)
and thus continues to process the next part of the path which doesn't
exist.
This patch adds a check if we have reached the last part of the filename
and return false in that case.
This we reject to add a file if a directory of the same name already
exists.
This is in sync with [this
check](https://github.com/llvm/llvm-project/blob/145815c180fc82c5a55bf568d01d98d250490a55/llvm/lib/Support/VirtualFileSystem.cpp#L903)
that rejects adding a path if a file of the same name already exists.
Commit: e9174ba789531b26709764b4f404ec368b77db44
https://github.com/llvm/llvm-project/commit/e9174ba789531b26709764b4f404ec368b77db44
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.h
M clang/test/AST/Interp/arrays.cpp
M clang/test/AST/Interp/literals.cpp
Log Message:
-----------
[clang][Interp] Always decay root array pointers to the first element
This is similar to what the current interpreter does.
Commit: f882f8c293d2064619f7eb3dc716dcaf3e2da875
https://github.com/llvm/llvm-project/commit/f882f8c293d2064619f7eb3dc716dcaf3e2da875
Author: Chen Zheng <czhengsz at cn.ibm.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/utils/lit/lit/llvm/config.py
Log Message:
-----------
[AIX] use LIBPATH on AIX instead of LD_LIBRARY_PATH (#94602)
LD_LIBRARY_PATH will become invalid when LIBPATH is also set on AIX.
See below example on AIX:
```
$ldd a.out
a.out needs:
/usr/lib/libc.a(shr.o)
Cannot find libtest.a
/unix
/usr/lib/libcrypt.a(shr.o)
$./a.out
Could not load program ./a.out:
Dependent module libtest.a could not be loaded.
Could not load module libtest.a.
System error: No such file or directory
$export LD_LIBRARY_PATH=$LD_LIBRARY_PATH:/tmp
$./a.out ; echo $?
10
$export LIBPATH=./
$./a.out ; echo $? >>>>>> Now LD_LIBRARY_PATH is not used by system loader
Could not load program ./a.out:
Dependent module libtest.a could not be loaded.
Could not load module libtest.a.
System error: No such file or directory
```
This breaks many AIX LIT cases on our downstream buildbots which sets
LIBPATH.
---------
Co-authored-by: Anh Tuyen Tran <34661776+anhtuyenibm at users.noreply.github.com>
Co-authored-by: David Tenty <daltenty.dev at gmail.com>
Commit: 7573d5e4b10cc7befc54d29edd7ec94d9bf11b93
https://github.com/llvm/llvm-project/commit/7573d5e4b10cc7befc54d29edd7ec94d9bf11b93
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUMemoryUtils.h
Log Message:
-----------
[AMDGPU] Update removeFnAttrFromReachable to accept array of Fn Attrs. (#94188)
This PR updates removeFnAttrFromReachable in AMDGPUMemoryUtils to accept
array of function attributes as argument.
Helps to remove multiple attributes in one CallGraph walk.
Commit: a76290d6acedb4dcdd431cdd21f057255117f8d3
https://github.com/llvm/llvm-project/commit/a76290d6acedb4dcdd431cdd21f057255117f8d3
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M lldb/source/Expression/DWARFExpression.cpp
Log Message:
-----------
[lldb] Refactor ReadRegisterValueAsScalar to return an llvm::Error (NFC) (#94556)
Commit: 67aaa9f9974993f360cc0dabffd73b51c030d775
https://github.com/llvm/llvm-project/commit/67aaa9f9974993f360cc0dabffd73b51c030d775
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M lldb/source/Expression/DWARFExpression.cpp
Log Message:
-----------
[lldb] Refactor ResolveLoadAddress to return an llvm::Expected (NFC) (#94558)
Commit: 7fdbc30b445286f03203e16d0be067c25c6f0df0
https://github.com/llvm/llvm-project/commit/7fdbc30b445286f03203e16d0be067c25c6f0df0
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParser.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/source/Plugins/SymbolFile/DWARF/DebugNamesDWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDebugMap.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.h
M lldb/source/Plugins/SymbolFile/DWARF/UniqueDWARFASTType.cpp
M lldb/source/Plugins/SymbolFile/DWARF/UniqueDWARFASTType.h
R lldb/test/Shell/SymbolFile/DWARF/delayed-definition-die-searching.test
Log Message:
-----------
Revert "[lldb][DebugNames] Only skip processing of DW_AT_declarations for class/union types"
and two follow-up commits. The reason is the crash we've discovered when
processing -gsimple-template-names binaries. I'm committing a minimal
reproducer as a separate patch.
This reverts the following commits:
- 51dd4eaaa29683c16151f5168e7f8645acbd6e6c (#92328)
- 3d9d48523977af3590f7dd0edfd258454cb9e9cf (#93839)
- afe6ab7586f7078cc410f6162bd9851e48e2a286 (#94400)
Commit: de3f1b6d68ab8a0e827db84b328803857a4f60df
https://github.com/llvm/llvm-project/commit/de3f1b6d68ab8a0e827db84b328803857a4f60df
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
A lldb/test/Shell/SymbolFile/DWARF/x86/simple-template-names-context.cpp
Log Message:
-----------
[lldb] Test case for the bug in #92328
Commit: 1ca0055f45abe7e4d484a0af457fc20be318c8e2
https://github.com/llvm/llvm-project/commit/1ca0055f45abe7e4d484a0af457fc20be318c8e2
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/include/clang/Basic/Cuda.h
M clang/lib/Basic/Cuda.cpp
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
M clang/test/Driver/amdgpu-macros.cl
M clang/test/Driver/amdgpu-mcpu.cl
M clang/test/Misc/target-invalid-cpu-note.c
M flang/cmake/modules/AddFlangOffloadRuntime.cmake
M libclc/CMakeLists.txt
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/TargetParser/TargetParser.h
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
M llvm/test/CodeGen/AMDGPU/occupancy-levels.ll
M llvm/test/MC/AMDGPU/gfx1150_asm_features.s
M llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
M llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
M llvm/tools/llvm-readobj/ELFDumper.cpp
M offload/DeviceRTL/CMakeLists.txt
Log Message:
-----------
[AMDGPU] Add a new target gfx1152 (#94534)
Commit: ab33fa59a2a5ae688426be8307584f78363326d0
https://github.com/llvm/llvm-project/commit/ab33fa59a2a5ae688426be8307584f78363326d0
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/math/smoke/BUILD.bazel
Log Message:
-----------
[bazel] Fix smoke/BUILD.bazel layering in nextafter_test_template (#94641)
After 63cda2d19c310826722e8724649ceae7307389d7.
See also a97871e07dd62510dea1bb71b0f74261f52e4479.
Commit: 212b78aad41b35df3af33bfffac678b460d467e9
https://github.com/llvm/llvm-project/commit/212b78aad41b35df3af33bfffac678b460d467e9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AMDGPU/fmaximum3.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
M llvm/test/CodeGen/X86/avx512fp16-fminimum-fmaximum.ll
Log Message:
-----------
DAG: Improve fminimum/fmaximum vector expansion logic (#93579)
First, expandFMINIMUM_FMAXIMUM should be a never-fail API. The client
wanted it expanded, and it can always be expanded. This logic was tied
up with what the VectorLegalizer wanted.
Prefer using the min/max opcodes, and unrolling if we don't have a
vselect.
This seems to produce better code in all the changed tests.
Commit: 429e5be768c21d208ab688f8dfa1399c04ec5626
https://github.com/llvm/llvm-project/commit/429e5be768c21d208ab688f8dfa1399c04ec5626
Author: Piotr Zegar <me at piotrzegar.pl>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang-tools-extra/clang-tidy/readability/ContainerSizeEmptyCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/readability/container-size-empty.cpp
Log Message:
-----------
[clang-tidy] Fix crash in readability-container-size-empty (#94527)
Fixed crash caused by call to getCookedLiteral on
template user defined literal. Fix base on assert in getCookedLiteral
method.
Closes #94454
Commit: e8500a70540a04adfb8e102d3cfa6b9d95bc3ba6
https://github.com/llvm/llvm-project/commit/e8500a70540a04adfb8e102d3cfa6b9d95bc3ba6
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/test/CodeGenCUDA/cuda-builtin-vars.cu
Log Message:
-----------
fixup cuda-builtin-vars.cu broken in IntrRange change (#94639)
Commit: 39d38d66ec1cde07cfb959d1cf94b0adc6eb16ef
https://github.com/llvm/llvm-project/commit/39d38d66ec1cde07cfb959d1cf94b0adc6eb16ef
Author: aaryanshukla <53713108+aaryanshukla at users.noreply.github.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/atexithandler_t.h
M libc/spec/stdc.td
M libc/src/stdlib/CMakeLists.txt
A libc/src/stdlib/at_quick_exit.cpp
A libc/src/stdlib/at_quick_exit.h
M libc/src/stdlib/atexit.cpp
M libc/src/stdlib/atexit.h
A libc/src/stdlib/exit_handler.cpp
A libc/src/stdlib/exit_handler.h
M libc/src/stdlib/quick_exit.cpp
M libc/test/src/stdlib/CMakeLists.txt
A libc/test/src/stdlib/at_quick_exit_test.cpp
Log Message:
-----------
[libc] at_quick_exit function implemented (#94317)
- added at_quick_exit function
- used helper file exit_handler which reuses code from atexit
- atexit now calls helper functions from exit_handler
- test cases and dependencies are added
---------
Co-authored-by: Aaryan Shukla <aaryanshukla at google.com>
Commit: 7eab68026d931860e9c750e8b8b29a2076370d38
https://github.com/llvm/llvm-project/commit/7eab68026d931860e9c750e8b8b29a2076370d38
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELF.h
Log Message:
-----------
[AMDGPU] Fix GFX1152 ELF arch
Commit: 088b98a458b449a633e15d98ae3cead65807534e
https://github.com/llvm/llvm-project/commit/088b98a458b449a633e15d98ae3cead65807534e
Author: Florian Mayer <fmayer at google.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/test/Instrumentation/HWAddressSanitizer/stack-safety-analysis.ll
Log Message:
-----------
[HWASan] add optimization remarks for ignoreAccess (#94551)
Commit: 04acf1177ebd75b91f60edf6da67304a339cb886
https://github.com/llvm/llvm-project/commit/04acf1177ebd75b91f60edf6da67304a339cb886
Author: Abhina Sree <69635948+abhina-sree at users.noreply.github.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M third-party/unittest/googletest/include/gtest/internal/gtest-port.h
Log Message:
-----------
[gtest] Enable zos for death test support (#94623)
This patch implements the following change to enable zos for death test
support. https://github.com/google/googletest/pull/4527
Commit: ce938fcbde547315af18a47a609c2e09ebfb4cec
https://github.com/llvm/llvm-project/commit/ce938fcbde547315af18a47a609c2e09ebfb4cec
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.cpp
M clang/test/AST/Interp/cxx23.cpp
Log Message:
-----------
[clang][Interp] Diagnose functions without body like undefined ones
We only get a "reached end of constexpr function" diagnostic
otherwise.
Commit: 7cfad77a5e3e9145213b024b9151ff812b54de51
https://github.com/llvm/llvm-project/commit/7cfad77a5e3e9145213b024b9151ff812b54de51
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/icmp-of-or-x.ll
Log Message:
-----------
[InstCombine] Add tests for folding multiuse `(icmp eq/ne (or X, Y), Y)`; NFC
Commit: 3716a3c1bce4af81db6a95eee30e35b5b923e319
https://github.com/llvm/llvm-project/commit/3716a3c1bce4af81db6a95eee30e35b5b923e319
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-of-or-x.ll
Log Message:
-----------
[InstCombine] Folding multiuse `(icmp eq/ne (or X, Y), Y)` for 2 uses of `Y`
The fold will replace 2 uses of `Y` we should also do fold if `Y` has
2 uses (not only oneuse).
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D159062
Commit: 3a95c688cc427b2971cb69abb9bd322b5a449fb4
https://github.com/llvm/llvm-project/commit/3a95c688cc427b2971cb69abb9bd322b5a449fb4
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M clang/include/clang/Basic/riscv_vector.td
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vcpopv.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vcpopv.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vcpopv.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vcpopv.c
Log Message:
-----------
[clang][RISCV] Update vcpop.v C interface to follow the nameing convention (#94318)
We named the intrinsics by replacing "." by "_" in the instruction
conventionally, so the `vcpopv_v` where the corresponding instruction is
`vcpop.v` should be named `vcpop_v`.
Commit: 9eac38a000d510e9b162d6996816ef298019b553
https://github.com/llvm/llvm-project/commit/9eac38a000d510e9b162d6996816ef298019b553
Author: Teresa Johnson <tejohnson at google.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
Log Message:
-----------
[MemProf] Remove context id set from nodes and recompute on demand (#94415)
The ContextIds set on the ContextNode struct is not technically needed
as we can compute it from either the callee or caller edge context ids.
Remove it and add a helper to recompute from the edges on demand. Also
add helpers to compute the node allocation type and whether the context
ids are empty from the edges without needing to first compute the node's
context id set, to minimize the runtime cost increase.
This yielded a 20% reduction in peak memory for a large thin link, for
about a 2% time increase (which is more than offset by some other recent
time efficiency improvements).
Commit: 88cdd9905597ace5b1ac7d080df5326d3399b3f8
https://github.com/llvm/llvm-project/commit/88cdd9905597ace5b1ac7d080df5326d3399b3f8
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRAttr.td
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Optimizer/Dialect/FIRAttr.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
A flang/test/Fir/loop03.fir
Log Message:
-----------
[flang] Add reduction semantics to fir.do_loop (#93934)
Derived from #92480. This PR introduces reduction semantics into loops
for DO CONCURRENT REDUCE. The `fir.do_loop` operation now invisibly has
the `operandSegmentsizes` attribute and takes variable-length reduction
operands with their operations given as `fir.reduce_attr`. For the sake
of compatibility, `fir.do_loop`'s builder has additional arguments at
the end. The `iter_args` operand should be placed in front of the
declaration of result types, so the new operand for reduction variables
(`reduce`) is put in the middle of arguments.
Commit: 649edb8eb25e82e3ac6fce4788f51759636229ec
https://github.com/llvm/llvm-project/commit/649edb8eb25e82e3ac6fce4788f51759636229ec
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M libc/src/__support/fixedvector.h
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/fixedvector_test.cpp
Log Message:
-----------
[libc][FixedVector] Add more helper methods (#94278)
This adds:
- A ctor accepting a start and end iterator
- A ctor accepting a count and const T&
- size()
- subscript operators
- begin() and end() iterators
Commit: f0785484c8ebf42ae0284cd608ad5f78eae20e95
https://github.com/llvm/llvm-project/commit/f0785484c8ebf42ae0284cd608ad5f78eae20e95
Author: Yuxuan Chen <ych at fb.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/lib/ExtractAPI/Serialization/SymbolGraphSerializer.cpp
Log Message:
-----------
[clang][NFC] fix name lookup for llvm::json::Value in SymbolGraphSerializer (#94511)
This code uses namespaces `llvm` and `llvm::json`. However, we have both
`llvm::Value` and `llvm::json::Value`. Whenever any of the headers
declare or include `llvm::Value`, the lookup becomes ambiguous.
Fixing this by qualifying the `Value` type.
Commit: d55e235b2384281a5d1d982094fb2f819999885b
https://github.com/llvm/llvm-project/commit/d55e235b2384281a5d1d982094fb2f819999885b
Author: Kazu Hirata <kazu at google.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/ProfileData/MemProfReader.cpp
Log Message:
-----------
[memprof] Use std::unique_ptr instead of std::optional (#94655)
Changing the type of Frame::SymbolName from std::optional<std::string>
to std::unique<std::string> reduces sizeof(Frame) from 64 to 32.
The smaller type reduces the cycle and instruction counts by 23% and
4.4%, respectively, with "llvm-profdata show" modified to deserialize
all MemProfRecords in a MemProf V2 profile. The peak memory usage is
cut down nearly by half.
Commit: c771b670eabbd38867d43475dacd35a1b572e9b5
https://github.com/llvm/llvm-project/commit/c771b670eabbd38867d43475dacd35a1b572e9b5
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.mir
Log Message:
-----------
[AMDGPU] Promote immediate offset to atomics (#94043)
Commit: 9ad0175ea0099351050e1dfb0074d9938f469404
https://github.com/llvm/llvm-project/commit/9ad0175ea0099351050e1dfb0074d9938f469404
Author: Fangrui Song <i at maskray.me>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M lld/ELF/Writer.cpp
M lld/test/ELF/linkerscript/memory-nonalloc-no-warn.test
M lld/test/ELF/linkerscript/sections-nonalloc.s
M lld/test/ELF/linkerscript/sections.s
Log Message:
-----------
[ELF] Keep non-alloc orphan sections at the end
https://reviews.llvm.org/D85867 changed the way we assign file offsets
(alloc sections first, then non-alloc sections).
It also removed a non-alloc special case from `findOrphanPos`.
Looking at the memory-nonalloc-no-warn.test change, which would be
needed by #93761, it makes sense to restore the previous behavior: when
placing non-alloc orphan sections, keep these sections at the end so
that the section index order matches the file offset order.
This change is cosmetic. In sections-nonalloc.s, GNU ld places the
orphan `other3` in the middle and the orphan .symtab/.shstrtab/.strtab
at the end.
Pull Request: https://github.com/llvm/llvm-project/pull/94519
Commit: 5d0308f3930887a1610b6965b6c8cec10733cdb2
https://github.com/llvm/llvm-project/commit/5d0308f3930887a1610b6965b6c8cec10733cdb2
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/__support/BUILD.bazel
Log Message:
-----------
[bazel] Port for 649edb8eb25e82e3ac6fce4788f51759636229ec
Commit: d09231a422f052d6f6f44913fad610728a7c266b
https://github.com/llvm/llvm-project/commit/d09231a422f052d6f6f44913fad610728a7c266b
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M lldb/examples/python/crashlog.py
M lldb/test/Shell/ScriptInterpreter/Python/Crashlog/app_specific_backtrace_crashlog.test
M lldb/test/Shell/ScriptInterpreter/Python/Crashlog/interactive_crashlog_invalid_target.test
M lldb/test/Shell/ScriptInterpreter/Python/Crashlog/interactive_crashlog_json.test
M lldb/test/Shell/ScriptInterpreter/Python/Crashlog/interactive_crashlog_legacy.test
M lldb/test/Shell/ScriptInterpreter/Python/Crashlog/last_exception_backtrace_crashlog.test
M lldb/test/Shell/ScriptInterpreter/Python/Crashlog/lit.local.cfg
M lldb/test/Shell/ScriptInterpreter/Python/Crashlog/skipped_status_interactive_crashlog.test
Log Message:
-----------
[lldb/crashlog] Remove aarch64 requirement on crashlog tests (#94553)
This PR removes the `target-aarch64` requirement on the crashlog tests
to exercice them on Intel bots and make image loading single-threaded
temporarily while implementing a fix for a deadlock issue when loading
the images in parallel.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 2cc16442998786f7716ee7093c4f29f1b9b07cd5
https://github.com/llvm/llvm-project/commit/2cc16442998786f7716ee7093c4f29f1b9b07cd5
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M offload/test/offloading/ompx_bare_shfl_down_sync.cpp
Log Message:
-----------
[Offload] Fix missing `abs` function for test
Summary:
We don't have the abs function to link against, just use the builtin.
Commit: 878deaeeadb940c892908cb51356b60000626db8
https://github.com/llvm/llvm-project/commit/878deaeeadb940c892908cb51356b60000626db8
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/test/DebugInfo/symbolize-gnu-debuglink-no-realpath.test
M llvm/test/Other/can-execute.txt
M llvm/test/Other/lit-unicode.txt
M llvm/test/tools/llvm-cov/gcov/intermediate-format.test
M llvm/test/tools/llvm-rc/windres-prefix.test
M llvm/test/tools/split-file/output-is-special.test
Log Message:
-----------
[LLVM] Do not require shell for some tests (#94595)
Remove `REQUIRES: shell` from some tests that seem fine without it.
Tested on Windows and with LIT_USE_INTERNAL_SHELL=1 on Linux.
Commit: f543dfd1d70d2e5d9a746dd77450304c47cd7c15
https://github.com/llvm/llvm-project/commit/f543dfd1d70d2e5d9a746dd77450304c47cd7c15
Author: Christopher Bate <cbate at nvidia.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/FunctionCallUtils.h
M mlir/lib/Conversion/MemRefToLLVM/AllocLikeConversion.cpp
M mlir/lib/Dialect/LLVMIR/IR/FunctionCallUtils.cpp
Log Message:
-----------
NFC: resolve TODO in LLVM dialect conversions (#91497)
Relaxes restriction that certain public utility functions only apply
to the builtin ModuleOp.
Commit: 9293fc7981526eaca0a28012f2e5963fff1b830b
https://github.com/llvm/llvm-project/commit/9293fc7981526eaca0a28012f2e5963fff1b830b
Author: Alex Langford <alangford at apple.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M lldb/source/Target/Statistics.cpp
Log Message:
-----------
[lldb] Include memory stats in statistics summary (#94671)
The summary already includes other size information, e.g. total debug
info size in bytes. The only other way I can get this information is by
dumping all statistics which can be quite large. Adding it to the
summary seems fair.
Commit: 9e209a4a3728a599c434bfed4fa37fd8b5907e89
https://github.com/llvm/llvm-project/commit/9e209a4a3728a599c434bfed4fa37fd8b5907e89
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
Log Message:
-----------
[Offload] Use the kernel argument size directly in AMDGPU offloading (#94667)
Summary:
The old COV3 implementation of HSA used to omit the implicit arguments
from the kernel argument size. For COV4 and COV5 this is no longer the
case so we can simply use the size reported from the symbol information.
See
https://github.com/ROCm/ROCR-Runtime/issues/117#issuecomment-812758161
Commit: 06f03b806a347619f0251220baff56209abe9711
https://github.com/llvm/llvm-project/commit/06f03b806a347619f0251220baff56209abe9711
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
Log Message:
-----------
[RISCV][InsertVSETVLI] Check for undef register operand directly [nfc]
getVNInfoFromReg is expected to return a nullptr if-and-only-if the
operand is undef. (This was asserted for.) Reverse the order of the
checks to simplify an upcoming set of patches.
Commit: fbcb92ca017ee7fbf84be808701133fbdf3b1c59
https://github.com/llvm/llvm-project/commit/fbcb92ca017ee7fbf84be808701133fbdf3b1c59
Author: Fangrui Song <i at maskray.me>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M lld/test/ELF/linkerscript/sections-nonalloc.s
Log Message:
-----------
[ELF] Test non-alloc orphan that does not the RF_NOT_ADDR_SET rank flag
Commit: 7476c20c481cbccbdb89139fb94620e083015932
https://github.com/llvm/llvm-project/commit/7476c20c481cbccbdb89139fb94620e083015932
Author: Kazu Hirata <kazu at google.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/include/llvm/Support/Endian.h
M llvm/lib/ProfileData/InstrProf.cpp
Log Message:
-----------
[ProfileData] Remove swapToHostOrder (#94665)
This patch removes swapToHostOrder in favor of
llvm::support::endian::readNext as swapToHostOrder is too thin a
wrapper around readNext.
Note that there are two variants of readNext:
- readNext<type, endian, align>(ptr)
- readNext<type, align>(ptr, endian)
swapToHostOrder uses the former, but this patch switches to the latter.
While we are at it, this patch teaches readNext to default to
unaligned just as I did in:
commit 568368a43e5b4adb3c5d105a0eff3e0c13c0af8c
Author: Kazu Hirata <kazu at google.com>
Date: Mon Apr 15 19:05:30 2024 -0700
Commit: 12ccc245f195695c8bac9156c75e5b70044882fa
https://github.com/llvm/llvm-project/commit/12ccc245f195695c8bac9156c75e5b70044882fa
Author: Dave Lee <davelee.com at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticOptions.h
Log Message:
-----------
[clang] Fix flag typo in comment
Fixed for more accurate searches of the flag `-Wsystem-headers-in-module=`.
Commit: 4a918f071005a2d7aba82e031f3f745270bf67da
https://github.com/llvm/llvm-project/commit/4a918f071005a2d7aba82e031f3f745270bf67da
Author: Kazu Hirata <kazu at google.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/ProfileData/MemProf.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
Log Message:
-----------
[memprof] Use std::vector<Frame> instead of llvm::SmallVector<Frame> (NFC) (#94432)
This patch replaces llvm::SmallVector<Frame> with std::vector<Frame>.
llvm::SmallVector<Frame> sets aside one inline element. Meanwhile,
when I sort all call stacks by their lengths, the length at the first
percentile is already 2. That is, 99 percent of call stacks do not
take advantage of the inline element.
Using std::vector<Frame> reduces the cycle and instruction counts by
11% and 22%, respectively, with "llvm-profdata show" modified to
deserialize all MemProfRecords.
Commit: ba7f52ccf42fd481a1b309fe76863729fdd18c1c
https://github.com/llvm/llvm-project/commit/ba7f52ccf42fd481a1b309fe76863729fdd18c1c
Author: Alex Langford <alangford at apple.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M lldb/test/API/functionalities/stats_api/TestStatisticsAPI.py
Log Message:
-----------
[lldb] Fix TestStatisticsAPI after 9293fc798152 (#94683)
Commit: 81e9a3c3fc9552ef0e1191da70aa0d44d918bcc0
https://github.com/llvm/llvm-project/commit/81e9a3c3fc9552ef0e1191da70aa0d44d918bcc0
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/test/Interpreter/pretty-print.c
Log Message:
-----------
[clang-repl] Disable new test after #89811
Commit: 855af13e8a1ded22fde3898c4e321cc5830eebf1
https://github.com/llvm/llvm-project/commit/855af13e8a1ded22fde3898c4e321cc5830eebf1
Author: aaryanshukla <53713108+aaryanshukla at users.noreply.github.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M libc/src/stdlib/CMakeLists.txt
Log Message:
-----------
[libc] fixed target issue with exit_handler (#94678)
- addressed
https://github.com/llvm/llvm-project/pull/94317#issuecomment-2153103129
- added conditional in cmake file for exit_handler object library
Co-authored-by: Aaryan Shukla <aaryanshukla at google.com>
Commit: b1861429cb1843c3a3da56b1411fdb131fc33519
https://github.com/llvm/llvm-project/commit/b1861429cb1843c3a3da56b1411fdb131fc33519
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_bitvector.h
Log Message:
-----------
[sanitizer] Make CHECKs in bitvector more precise (NFC) (#94630)
These CHECKs are all checking indices, which must be strictly smaller
than the size (otherwise they would go out of bounds).
Commit: 19bbbcbedcbddcfc39202d7d801508a20baf83b6
https://github.com/llvm/llvm-project/commit/19bbbcbedcbddcfc39202d7d801508a20baf83b6
Author: Thurston Dang <thurston at google.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/tests/sanitizer_allocator_test.cpp
Log Message:
-----------
[sanitizer_common] Change allocator base in test case for compatibili… (#93234)
…ty with high-entropy ASLR
With high-entropy ASLR (e.g., 32-bits == 16TB), the allocator base of
0x700000000000 (112TB) may collide with the placement of the libraries
(e.g., on Linux, the mmap base could be 128TB - 16TB == 112TB). This
results in a segfault in the test case.
This patch moves the allocator base below the PIE program segment,
inspired by fb77ca05ffb4f8e666878f2f6718a9fb4d686839. As per that patch:
1) we are leaving the old behavior for Apple 2) since ASLR cannot be set
above 32-bits for x86-64 Linux, we expect this new layout to be durable.
Note that this is only changing a test case, not the behavior of
sanitizers. Sanitizers have their own settings for initializing the
allocator base.
Reproducer:
1. ninja check-sanitizer # Just to build the test binary needed below;
no need to actually run the tests here
2. sudo sysctl vm.mmap_rnd_bits=32 # Increase ASLR entropy
3. for f in `seq 1 10000`; do echo $f;
GTEST_FILTER=*SizeClassAllocator64Dense
./projects/compiler-rt/lib/sanitizer_common/tests/Sanitizer-x86_64-Test
> /tmp/x; if [ $? -ne 0 ]; then cat /tmp/x; fi; done
Commit: 92a870888c2d19f0004d2d0bc90730559c6bf0f4
https://github.com/llvm/llvm-project/commit/92a870888c2d19f0004d2d0bc90730559c6bf0f4
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
Log Message:
-----------
[compiler-rt] Map internal_sigaction to __sys_sigaction on FreeBSD (#84441)
This function is called during very early startup and which can result
in a crash on FreeBSD. The sigaction() function in libc is indirected
via a table so that it can be interposed by the threading library
rather than calling the syscall directly. In the crash I was observing
this table had not yet been relocated, so we ended up jumping to an
invalid address. To avoid this problem we can call __sys_sigaction,
which calls the syscall directly and in FreeBSD 15 is part of libsys
rather than libc, so does not depend on libc being fully initialized.
Commit: 210692bcd6588ac4ae518436f55895a4520deb18
https://github.com/llvm/llvm-project/commit/210692bcd6588ac4ae518436f55895a4520deb18
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/include/llvm/IR/IRBuilderFolder.h
Log Message:
-----------
[llvm/IR] Fix module build issue following e57308b063bb (NFC) (#94580)
This patch fixes a build issue following e57308b063bb when enabling
module build.
With that change, we failed to build the LLVM_IR module since
GEPNoWrapFlags wasn't defined prior to using it.
This patch addressed that issue by including the missing header in
`llvm/IR/IRBuilderFolder.h` which uses the `GEPNoWrapFlags` type.
This should ensure that we can always build the `LLVM_IR` module.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 5c0df5fe2207562d99149bad65c04e3054181f75
https://github.com/llvm/llvm-project/commit/5c0df5fe2207562d99149bad65c04e3054181f75
Author: Kazu Hirata <kazu at google.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/ProfileData/MemProf.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Add CallStackRadixTreeBuilder (#93784)
Call stacks are a huge portion of the MemProf profile, taking up 70+%
of the profile file size.
This patch implements a radix tree to compress call stacks, which are
known to have long common prefixes. Specifically,
CallStackRadixTreeBuilder, introduced in this patch, takes call stacks
in the MemProf profile, sorts them in the dictionary order to maximize
the common prefix between adjacent call stacks, and then encodes a
radix tree into a single array that is ready for serialization.
The resulting radix array is essentially a concatenation of call stack
arrays, each encoded with its length followed by the payload, except
that these arrays contain "instructions" like "skip 7 elements
forward" to borrow common prefixes from other call stacks.
This patch does not integrate with the MemProf
serialization/deserialization infrastructure yet. Once integrated,
the radix tree is expected to roughly halve the file size of the
MemProf profile.
Commit: 21f5ee014db5df4fcf3dfe4350fe9c6627f799ad
https://github.com/llvm/llvm-project/commit/21f5ee014db5df4fcf3dfe4350fe9c6627f799ad
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M clang-tools-extra/clang-tidy/misc/HeaderIncludeCycleCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-tidy/checkers/misc/header-include-cycle.self.cpp
Log Message:
-----------
[clang-tidy]fix crashing when self include cycles for misc-header-include-cycle (#94636)
Fixes: #94634
Commit: 86070a84c454614275d0904f285f4bd20b6b7849
https://github.com/llvm/llvm-project/commit/86070a84c454614275d0904f285f4bd20b6b7849
Author: Konstantin Varlamov <varconsteq at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M libcxx/docs/Hardening.rst
M libcxx/docs/ReleaseNotes/18.rst
M libcxx/docs/TestingLibcxx.rst
M libcxx/include/__configuration/abi.h
Log Message:
-----------
[libc++][hardening] Finish documenting hardening. (#92021)
Commit: aae025a01b423ce43e554bc93da15016fa647beb
https://github.com/llvm/llvm-project/commit/aae025a01b423ce43e554bc93da15016fa647beb
Author: Fangrui Song <i at maskray.me>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M lld/test/ELF/relocatable-comdat.s
Log Message:
-----------
[ELF] Improve -r section group tests
Commit: 5e0fc93d01c216544c12b60c30fe8ac6c9931eb9
https://github.com/llvm/llvm-project/commit/5e0fc93d01c216544c12b60c30fe8ac6c9931eb9
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/lib/Format/ContinuationIndenter.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix a bug in `AlignAfterOpenBracket: DontAlign` (#94561)
Fixes #94555.
Commit: 79cd6c3d01c6c69ca870418a3c602dbd1bef29e4
https://github.com/llvm/llvm-project/commit/79cd6c3d01c6c69ca870418a3c602dbd1bef29e4
Author: Thurston Dang <thurston at google.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
A compiler-rt/test/dfsan/sscanf.c
Log Message:
-----------
[dfsan] Add test case for sscanf (#94700)
This test case shows a limitation of DFSan's sscanf implementation
(introduced in https://reviews.llvm.org/D153775): it simply ignores
ordinary characters in the format string, instead of actually comparing
them against the input. This may change the semantics of instrumented
programs.
Importantly, this also means that DFSan's release_shadow_space.c test,
which relies on sscanf to scrape the RSS from /proc/maps output, will
incorrectly match lines that don't contain RSS information. As a result,
it adding together numbers from irrelevant output (e.g., base
addresses), resulting in test flakiness
(https://github.com/llvm/llvm-project/issues/91287).
Commit: a1fa43d030168d1ecd04031b4790b101e651770a
https://github.com/llvm/llvm-project/commit/a1fa43d030168d1ecd04031b4790b101e651770a
Author: Fangrui Song <i at maskray.me>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Simplify code. NFC
Make it easier to add CREL support.
Commit: f42025c2178b30894df657af6aa92e45c7cc0dbc
https://github.com/llvm/llvm-project/commit/f42025c2178b30894df657af6aa92e45c7cc0dbc
Author: Fangrui Song <i at maskray.me>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVMergeRegionExitTargets.cpp
Log Message:
-----------
[SPIRV] Fix -Wunused-but-set-variable. NFC
Commit: 59003d714a9447bf03e0ce25ad4492290e80b110
https://github.com/llvm/llvm-project/commit/59003d714a9447bf03e0ce25ad4492290e80b110
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/select.ll
Log Message:
-----------
[InstCombine] Add tests for expanding `foldSelectValueEquivalence`; NFC
Commit: 7e7c29ba087e38056b91f1d783db0883dcc33ef7
https://github.com/llvm/llvm-project/commit/7e7c29ba087e38056b91f1d783db0883dcc33ef7
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/abs-1.ll
M llvm/test/Transforms/InstCombine/select.ll
Log Message:
-----------
[InstCombine] Improve coverage of `foldSelectValueEquivalence` for constants
We don't need the `noundef` check if the new simplification is a
constant.
This cleans up regressions from folding multiuse:
`(icmp eq/ne (sub/xor x, y), 0)` -> `(icmp eq/ne x, y)`.
Closes #88298
Commit: 2d65097b4ff18f99e4baf18e2e0b155ecf478b0a
https://github.com/llvm/llvm-project/commit/2d65097b4ff18f99e4baf18e2e0b155ecf478b0a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
Log Message:
-----------
[RISCV] Unify all the code that adds unaligned-scalar/vector-mem to Features vector. (#94660)
Instead of having multiple places insert into the Features vector
independently, check all the conditions in one place.
This avoids a subtle ordering requirement that -mstrict-align processing
had to be done after the others.
Commit: c967c7e0223845b54a5220e2d4211fee50c5fb30
https://github.com/llvm/llvm-project/commit/c967c7e0223845b54a5220e2d4211fee50c5fb30
Author: Nour <nourr313 at proton.me>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/tools/clang-format/ClangFormat.cpp
Log Message:
-----------
[clang-format][NFC] Remove an else after a return statement (#94548)
Commit: a10135f4922624f92c3a108d23ab64adc09dd285
https://github.com/llvm/llvm-project/commit/a10135f4922624f92c3a108d23ab64adc09dd285
Author: Gedare Bloom <gedare at rtems.org>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format]: Annotate colons found in inline assembly (#92617)
Short-circuit the parsing of tok::colon to label colons found within
lines starting with asm as InlineASMColon.
Fixes #92616.
---------
Co-authored-by: Owen Pan <owenpiano at gmail.com>
Commit: f2441b0297501610b59527f93e3174c814d63941
https://github.com/llvm/llvm-project/commit/f2441b0297501610b59527f93e3174c814d63941
Author: Weining Lu <luweining at loongson.cn>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
R clang/test/Driver/loongarch-default-features.c
A clang/test/Driver/loongarch-features.c
Log Message:
-----------
[Driver][test] Rename loongarch-{default-,}features.c
Commit: 5c104879c1a98eeb845c03e7c45206bd48e88f0c
https://github.com/llvm/llvm-project/commit/5c104879c1a98eeb845c03e7c45206bd48e88f0c
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M clang/include/clang/AST/ASTUnresolvedSet.h
M clang/include/clang/AST/DeclAccessPair.h
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/AST/DeclID.h
M clang/include/clang/AST/UnresolvedSet.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/Serialization/ModuleManager.h
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ModuleFile.cpp
A clang/test/Modules/no-transitive-decls-change.cppm
Log Message:
-----------
[serialization] no transitive decl change (#92083)
Following of https://github.com/llvm/llvm-project/pull/86912
The motivation of the patch series is that, for a module interface unit
`X`, when the dependent modules of `X` changes, if the changes is not
relevant with `X`, we hope the BMI of `X` won't change. For the specific
patch, we hope if the changes was about irrelevant declaration changes,
we hope the BMI of `X` won't change. **However**, I found the patch
itself is not very useful in practice, since the adding or removing
declarations, will change the state of identifiers and types in most
cases.
That said, for the most simple example,
```
// partA.cppm
export module m:partA;
// partA.v1.cppm
export module m:partA;
export void a() {}
// partB.cppm
export module m:partB;
export void b() {}
// m.cppm
export module m;
export import :partA;
export import :partB;
// onlyUseB;
export module onlyUseB;
import m;
export inline void onluUseB() {
b();
}
```
the BMI of `onlyUseB` will change after we change the implementation of
`partA.cppm` to `partA.v1.cppm`. Since `partA.v1.cppm` introduces new
identifiers and types (the function prototype).
So in this patch, we have to write the tests as:
```
// partA.cppm
export module m:partA;
export int getA() { ... }
export int getA2(int) { ... }
// partA.v1.cppm
export module m:partA;
export int getA() { ... }
export int getA(int) { ... }
export int getA2(int) { ... }
// partB.cppm
export module m:partB;
export void b() {}
// m.cppm
export module m;
export import :partA;
export import :partB;
// onlyUseB;
export module onlyUseB;
import m;
export inline void onluUseB() {
b();
}
```
so that the new introduced declaration `int getA(int)` doesn't introduce
new identifiers and types, then the BMI of `onlyUseB` can keep
unchanged.
While it looks not so great, the patch should be the base of the patch
to erase the transitive change for identifiers and types since I don't
know how can we introduce new types and identifiers without introducing
new declarations. Given how tightly the relationship between
declarations, types and identifiers, I think we can only reach the ideal
state after we made the series for all of the three entties.
The design of the patch is similar to
https://github.com/llvm/llvm-project/pull/86912, which extends the
32-bit DeclID to 64-bit and use the higher bits to store the module file
index and the lower bits to store the Local Decl ID.
A slight difference is that we only use 48 bits to store the new DeclID
since we try to use the higher 16 bits to store the module ID in the
prefix of Decl class. Previously, we use 32 bits to store the module ID
and 32 bits to store the DeclID. I don't want to allocate additional
space so I tried to make the additional space the same as 64 bits. An
potential interesting thing here is about the relationship between the
module ID and the module file index. I feel we can get the module file
index by the module ID. But I didn't prove it or implement it. Since I
want to make the patch itself as small as possible. We can make it in
the future if we want.
Another change in the patch is the new concept Decl Index, which means
the index of the very big array `DeclsLoaded` in ASTReader. Previously,
the index of a loaded declaration is simply the Decl ID minus
PREDEFINED_DECL_NUMs. So there are some places they got used
ambiguously. But this patch tried to split these two concepts.
As https://github.com/llvm/llvm-project/pull/86912 did, the change will
increase the on-disk PCM file sizes. As the declaration ID may be the
most IDs in the PCM file, this can have the biggest impact on the size.
In my experiments, this change will bring 6.6% increase of the on-disk
PCM size. No compile-time performance regression observed. Given the
benefits in the motivation example, I think the cost is worthwhile.
Commit: 222e0a042c1c7c3b1aec7557bcb60d1543c1737a
https://github.com/llvm/llvm-project/commit/222e0a042c1c7c3b1aec7557bcb60d1543c1737a
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/include/llvm/CodeGen/ScheduleDAG.h
M llvm/include/llvm/CodeGen/TargetLowering.h
Log Message:
-----------
[llvm][ScheduleDAG] Re-arrange SUnit's members to make it smaller (#94547)
before:
```
*** Dumping AST Record Layout
0 | class llvm::SUnit
0 | SDNode * Node
8 | MachineInstr * Instr
16 | SUnit * OrigNode
24 | const MCSchedClassDesc * SchedClass
32 | class llvm::SmallVector<class llvm::SDep, 4> Preds
32 | class llvm::SmallVectorImpl<class llvm::SDep> (base)
32 | class llvm::SmallVectorTemplateBase<class llvm::SDep> (base)
32 | class llvm::SmallVectorTemplateCommon<class llvm::SDep> (base)
32 | class llvm::SmallVectorBase<uint32_t> (base)
32 | void * BeginX
40 | unsigned int Size
44 | unsigned int Capacity
48 | struct llvm::SmallVectorStorage<class llvm::SDep, 4> (base)
48 | char[64] InlineElts
112 | class llvm::SmallVector<class llvm::SDep, 4> Succs
112 | class llvm::SmallVectorImpl<class llvm::SDep> (base)
112 | class llvm::SmallVectorTemplateBase<class llvm::SDep> (base)
112 | class llvm::SmallVectorTemplateCommon<class llvm::SDep> (base)
112 | class llvm::SmallVectorBase<uint32_t> (base)
112 | void * BeginX
120 | unsigned int Size
124 | unsigned int Capacity
128 | struct llvm::SmallVectorStorage<class llvm::SDep, 4> (base)
128 | char[64] InlineElts
192 | unsigned int NodeNum
196 | unsigned int NodeQueueId
200 | unsigned int NumPreds
204 | unsigned int NumSuccs
208 | unsigned int NumPredsLeft
212 | unsigned int NumSuccsLeft
216 | unsigned int WeakPredsLeft
220 | unsigned int WeakSuccsLeft
224 | unsigned short NumRegDefsLeft
226 | unsigned short Latency
228:0-0 | _Bool isVRegCycle
228:1-1 | _Bool isCall
228:2-2 | _Bool isCallOp
228:3-3 | _Bool isTwoAddress
228:4-4 | _Bool isCommutable
228:5-5 | _Bool hasPhysRegUses
228:6-6 | _Bool hasPhysRegDefs
228:7-7 | _Bool hasPhysRegClobbers
229:0-0 | _Bool isPending
229:1-1 | _Bool isAvailable
229:2-2 | _Bool isScheduled
229:3-3 | _Bool isScheduleHigh
229:4-4 | _Bool isScheduleLow
229:5-5 | _Bool isCloned
229:6-6 | _Bool isUnbuffered
229:7-7 | _Bool hasReservedResource
232 | Sched::Preference SchedulingPref
236:0-0 | _Bool isDepthCurrent
236:1-1 | _Bool isHeightCurrent
240 | unsigned int Depth
244 | unsigned int Height
248 | unsigned int TopReadyCycle
252 | unsigned int BotReadyCycle
256 | const TargetRegisterClass * CopyDstRC
264 | const TargetRegisterClass * CopySrcRC
| [sizeof=272, dsize=272, align=8,
| nvsize=272, nvalign=8]
```
after:
```
*** Dumping AST Record Layout
0 | class llvm::SUnit
0 | union llvm::SUnit::(anonymous at /Users/jonathan_roelofs/llvm-upstream/llvm/include/llvm/CodeGen/ScheduleDAG.h:246:5)
0 | SDNode * Node
0 | MachineInstr * Instr
8 | SUnit * OrigNode
16 | const MCSchedClassDesc * SchedClass
24 | const TargetRegisterClass * CopyDstRC
32 | const TargetRegisterClass * CopySrcRC
40 | class llvm::SmallVector<class llvm::SDep, 4> Preds
40 | class llvm::SmallVectorImpl<class llvm::SDep> (base)
40 | class llvm::SmallVectorTemplateBase<class llvm::SDep> (base)
40 | class llvm::SmallVectorTemplateCommon<class llvm::SDep> (base)
40 | class llvm::SmallVectorBase<uint32_t> (base)
40 | void * BeginX
48 | unsigned int Size
52 | unsigned int Capacity
56 | struct llvm::SmallVectorStorage<class llvm::SDep, 4> (base)
56 | char[64] InlineElts
120 | class llvm::SmallVector<class llvm::SDep, 4> Succs
120 | class llvm::SmallVectorImpl<class llvm::SDep> (base)
120 | class llvm::SmallVectorTemplateBase<class llvm::SDep> (base)
120 | class llvm::SmallVectorTemplateCommon<class llvm::SDep> (base)
120 | class llvm::SmallVectorBase<uint32_t> (base)
120 | void * BeginX
128 | unsigned int Size
132 | unsigned int Capacity
136 | struct llvm::SmallVectorStorage<class llvm::SDep, 4> (base)
136 | char[64] InlineElts
200 | unsigned int NodeNum
204 | unsigned int NodeQueueId
208 | unsigned int NumPreds
212 | unsigned int NumSuccs
216 | unsigned int NumPredsLeft
220 | unsigned int NumSuccsLeft
224 | unsigned int WeakPredsLeft
228 | unsigned int WeakSuccsLeft
232 | unsigned int TopReadyCycle
236 | unsigned int BotReadyCycle
240 | unsigned int Depth
244 | unsigned int Height
248:0-0 | _Bool isVRegCycle
248:1-1 | _Bool isCall
248:2-2 | _Bool isCallOp
248:3-3 | _Bool isTwoAddress
248:4-4 | _Bool isCommutable
248:5-5 | _Bool hasPhysRegUses
248:6-6 | _Bool hasPhysRegDefs
248:7-7 | _Bool hasPhysRegClobbers
249:0-0 | _Bool isPending
249:1-1 | _Bool isAvailable
249:2-2 | _Bool isScheduled
249:3-3 | _Bool isScheduleHigh
249:4-4 | _Bool isScheduleLow
249:5-5 | _Bool isCloned
249:6-6 | _Bool isUnbuffered
249:7-7 | _Bool hasReservedResource
250 | unsigned short NumRegDefsLeft
252 | unsigned short Latency
254:0-0 | _Bool isDepthCurrent
254:1-1 | _Bool isHeightCurrent
254:2-2 | _Bool isNode
254:3-3 | _Bool isInst
254:4-7 | Sched::Preference SchedulingPref
| [sizeof=256, dsize=255, align=8,
| nvsize=255, nvalign=8]
```
Commit: 4f70c5ec4a57e84642fa0772536f120cd9c75edb
https://github.com/llvm/llvm-project/commit/4f70c5ec4a57e84642fa0772536f120cd9c75edb
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M clang/include/clang/AST/ASTUnresolvedSet.h
M clang/include/clang/AST/DeclAccessPair.h
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/AST/DeclID.h
M clang/include/clang/AST/UnresolvedSet.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/Serialization/ModuleManager.h
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ModuleFile.cpp
R clang/test/Modules/no-transitive-decls-change.cppm
Log Message:
-----------
Revert "[serialization] no transitive decl change (#92083)"
This reverts commit 5c104879c1a98eeb845c03e7c45206bd48e88f0c.
The ArmV7 bot is complaining the change breaks the alignment.
Commit: 0e1d6e2fc48accbfdbb349dc460a4e91edf1d884
https://github.com/llvm/llvm-project/commit/0e1d6e2fc48accbfdbb349dc460a4e91edf1d884
Author: Christudasan Devadasan <christudasan.devadasan at amd.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
A llvm/test/CodeGen/AMDGPU/build_vector-r600.ll
M llvm/test/CodeGen/AMDGPU/build_vector.ll
Log Message:
-----------
[AMDGPU] Auto-generating lit test patterns (NFC) (#93837)
Test CodeGen/AMDGPU/build_vector.ll has the lit patterns partially
hand-written and the rest auto-generated. It doesn't look good when
changes are required with future patches. Auto-generating the entire
pattern. Moved out the R600 test into build_vector-r600.ll.
Commit: e96e7f1f33637ba5080c82e874622948c0a0c25b
https://github.com/llvm/llvm-project/commit/e96e7f1f33637ba5080c82e874622948c0a0c25b
Author: Christudasan Devadasan <christudasan.devadasan at amd.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
A llvm/test/CodeGen/AMDGPU/fabs-r600.ll
M llvm/test/CodeGen/AMDGPU/fabs.ll
A llvm/test/CodeGen/AMDGPU/fneg-fabs-r600.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
M llvm/test/CodeGen/AMDGPU/fneg.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.read.local.size.ll
M llvm/test/CodeGen/AMDGPU/packed-op-sel.ll
A llvm/test/CodeGen/AMDGPU/xor-r600.ll
M llvm/test/CodeGen/AMDGPU/xor.ll
Log Message:
-----------
[AMDGPU] Auto-generated some lit test patterns (NFC). (#94310)
Also, converted the R600 RUN lines from some tests into standalone tests.
Commit: 1bc8b3258e6d42f702fb11eb60d84d0e23935e3e
https://github.com/llvm/llvm-project/commit/1bc8b3258e6d42f702fb11eb60d84d0e23935e3e
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachinePassManager.h
A llvm/include/llvm/CodeGen/RegAllocFast.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AArch64/fast-regalloc-empty-bb-with-liveins.mir
M llvm/test/CodeGen/AMDGPU/fast-ra-kills-vcc.mir
M llvm/test/CodeGen/AMDGPU/fast-regalloc-bundles.mir
M llvm/test/CodeGen/AMDGPU/fastregalloc-illegal-subreg-physreg.mir
M llvm/test/CodeGen/AMDGPU/fastregalloc-self-loop-heuristic.mir
M llvm/test/CodeGen/AMDGPU/spill-agpr.mir
M llvm/test/CodeGen/AMDGPU/spill192.mir
M llvm/test/CodeGen/AMDGPU/spill224.mir
M llvm/test/CodeGen/AMDGPU/spill288.mir
M llvm/test/CodeGen/AMDGPU/spill320.mir
M llvm/test/CodeGen/AMDGPU/spill352.mir
M llvm/test/CodeGen/AMDGPU/spill384.mir
M llvm/test/CodeGen/AMDGPU/unexpected-reg-unit-state.mir
M llvm/test/CodeGen/ARM/regalloc-fast-rewrite-implicits.mir
M llvm/test/CodeGen/MIR/Generic/runPass.mir
M llvm/test/CodeGen/PowerPC/spill-nor0.mir
M llvm/test/CodeGen/SystemZ/regalloc-fast-invalid-kill-flag.mir
M llvm/test/CodeGen/Thumb/high-reg-clobber.mir
M llvm/test/CodeGen/Thumb2/high-reg-spill.mir
M llvm/test/CodeGen/X86/bug47278-eflags-error.mir
M llvm/test/CodeGen/X86/bug47278.mir
M llvm/test/CodeGen/X86/callbr-asm-outputs-regallocfast.mir
M llvm/test/CodeGen/X86/fastregalloc-selfloop.mir
M llvm/test/CodeGen/X86/fastregalloc-tied-undef.mir
M llvm/test/CodeGen/X86/regalloc-fast-missing-live-out-spill.mir
M llvm/test/CodeGen/X86/statepoint-fastregalloc.mir
M llvm/test/CodeGen/X86/virtreg-physreg-def-regallocfast.mir
A llvm/test/tools/llc/new-pm/regalloc-amdgpu.mir
Log Message:
-----------
[NewPM][CodeGen] Port `regallocfast` to new pass manager (#94426)
This pull request port `regallocfast` to new pass manager. It exposes
the parameter `filter` to handle different register classes for AMDGPU.
IIUC AMDGPU need to allocate different register classes separately so it
need implement its own `--<reg-class>-regalloc`. Now users can use e.g.
`-passe=regallocfast<filter=sgpr>` to allocate specific register class.
The command line option `--regalloc-npm` is still in work progress, plan
to reuse the syntax of passes, e.g. use
`--regalloc-npm=regallocfast<filter=sgpr>,greedy<filter=vgpr>` to
replace `--sgpr-regalloc` and `--vgpr-regalloc`.
Commit: 566befca28f5df9490ad4fcce31042d92526ba1e
https://github.com/llvm/llvm-project/commit/566befca28f5df9490ad4fcce31042d92526ba1e
Author: WANG Rui <wangrui at loongson.cn>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
A llvm/test/CodeGen/LoongArch/machinelicm-address-pseudos.ll
Log Message:
-----------
[NFC][LoongArch] Pre-commit tests for hoisting of PseudoLA*
Commit: a6350d63af63fb11d87d508965559bbb2833927d
https://github.com/llvm/llvm-project/commit/a6350d63af63fb11d87d508965559bbb2833927d
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M llvm/test/tools/llc/new-pm/regalloc-amdgpu.mir
Log Message:
-----------
[test] Don't generate `regalloc-amdgpu.s` in #94426 (#94722)
The test will generate an empty `regalloc-amdgpu.s` file in test, which
causes an unresolved test.
Commit: c5ff983fe4a3180e13c7244a6ce9f5994b4379b4
https://github.com/llvm/llvm-project/commit/c5ff983fe4a3180e13c7244a6ce9f5994b4379b4
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M clang-tools-extra/clang-tidy/misc/HeaderIncludeCycleCheck.cpp
Log Message:
-----------
[clang-tidy] refactor misc-header-include-cycle (#94697)
1. merge valid check
2. use range base loop
Commit: d231b50dba6cf1b3ab095d381ae622e9498bbb3c
https://github.com/llvm/llvm-project/commit/d231b50dba6cf1b3ab095d381ae622e9498bbb3c
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M libcxx/.clang-tidy
M libcxx/include/__functional/bind.h
M libcxx/include/__mdspan/extents.h
Log Message:
-----------
[libc++] Fix naming of value template parameters (#76888)
Commit: 670fa2bd7a4d50c33bc24d4e3e1fa4079592b730
https://github.com/llvm/llvm-project/commit/670fa2bd7a4d50c33bc24d4e3e1fa4079592b730
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M clang/include/clang/Sema/Initialization.h
M clang/lib/Sema/SemaAvailability.cpp
A clang/test/Sema/attr-availability-macosx.cpp
Log Message:
-----------
Fix spurious non-strict availability warning (#94377)
The availability attributes are stored on the function declarations. The
code was looking for them in the function template declarations. This
resulted in spuriously diagnosing (non-strict) availablity issues in
contexts that are not available.
Co-authored-by: Gabor Horvath <gaborh at apple.com>
Commit: 1752740f4b4b752bbe2987a0de398c6f671ceb71
https://github.com/llvm/llvm-project/commit/1752740f4b4b752bbe2987a0de398c6f671ceb71
Author: Prashant Kumar <pk5561 at gmail.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/test/Dialect/Tensor/canonicalize.mlir
Log Message:
-----------
[mlir][tensor] Fix FoldTensorCastProducerOp for multiple result operations (#93374)
For patterns where there are multiple results apart from dpsInits, this
fails.
E.g.:
```
%13:2 = iree_codegen.ukernel.generic "iree_uk_unpack"
ins(%extracted_slice : tensor<?x1x16x16xf32>) outs(%11 :
tensor<?x?xf32>) ... -> tensor<?x?xf32>, i32
```
The above op has results apart from dpsInit and hence fails. The PR
assumes that the result has dpsInits followed by nonDpsInits.
Commit: ec94e7a93031549b1f4e21e560ff4d3db265973a
https://github.com/llvm/llvm-project/commit/ec94e7a93031549b1f4e21e560ff4d3db265973a
Author: Fangrui Song <i at maskray.me>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/MC/MCSection.cpp
Log Message:
-----------
[MC] MCSection::dump: print section name
Commit: 0b8acc06c42df9d444f669fff312fffffcacdfb9
https://github.com/llvm/llvm-project/commit/0b8acc06c42df9d444f669fff312fffffcacdfb9
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.h
M clang/test/AST/Interp/cxx20.cpp
Log Message:
-----------
[clang][Interp] Improve APValue machinery
Handle lvalues pointing to declarations, unions and member pointers.
Commit: d843c02aba5d253891ea0e599c4b6e25247c1af7
https://github.com/llvm/llvm-project/commit/d843c02aba5d253891ea0e599c4b6e25247c1af7
Author: Freddy Ye <freddy.ye at intel.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M llvm/include/llvm/TargetParser/X86TargetParser.def
Log Message:
-----------
[X86] Assign AVX10_1 feature priority to align with gcc. (#94557)
gcc patch:
https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=1f2ca510065a2033bac408eb5a960ef0126f25cc
Commit: 90b9922df2d8fb65a33eb9abd002fa9262863b5b
https://github.com/llvm/llvm-project/commit/90b9922df2d8fb65a33eb9abd002fa9262863b5b
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M lldb/include/lldb/Core/ValueObject.h
M lldb/include/lldb/Core/ValueObjectConstResult.h
M lldb/include/lldb/Core/ValueObjectConstResultCast.h
M lldb/include/lldb/Core/ValueObjectConstResultChild.h
M lldb/include/lldb/Core/ValueObjectConstResultImpl.h
M lldb/include/lldb/Core/ValueObjectRegister.h
M lldb/include/lldb/Core/ValueObjectVTable.h
M lldb/source/Core/ValueObject.cpp
M lldb/source/Core/ValueObjectConstResult.cpp
M lldb/source/Core/ValueObjectConstResultCast.cpp
M lldb/source/Core/ValueObjectConstResultChild.cpp
M lldb/source/Core/ValueObjectConstResultImpl.cpp
M lldb/source/Core/ValueObjectRegister.cpp
M lldb/source/Core/ValueObjectVTable.cpp
Log Message:
-----------
[lldb] Split ValueObject::CreateChildAtIndex into two functions (#94455)
The the function is doing two fairly different things, depending on how
it is called. While this allows for some code reuse, it also makes it
hard to override it correctly. Possibly for this reason
ValueObjectSynthetic overerides GetChildAtIndex instead, which forces it
to reimplement some of its functionality, most notably caching of
generated children.
Splitting this up makes it easier to move the caching to a common place
(and hopefully makes the code easier to follow in general).
Commit: c007883f0286a314eb69976ad14da2bce988fb55
https://github.com/llvm/llvm-project/commit/c007883f0286a314eb69976ad14da2bce988fb55
Author: Freddy Ye <freddy.ye at intel.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M llvm/include/llvm/TargetParser/X86TargetParser.def
Log Message:
-----------
Revert "[X86] Assign AVX10_1 feature priority to align with gcc. (#94557)" (#94730)
This reverts commit d843c02aba5d253891ea0e599c4b6e25247c1af7.
Commit: b7d976d4e520a7acba71e006e1518d147a862138
https://github.com/llvm/llvm-project/commit/b7d976d4e520a7acba71e006e1518d147a862138
Author: Kazu Hirata <kazu at google.com>
Date: 2024-06-06 (Thu, 06 Jun 2024)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
Log Message:
-----------
[memprof] Use std::move in ContextEdge::ContextEdge (NFC) (#94687)
Since the constructor of ContextEdge takes ContextIds by value, we
should move it to the corresponding member variable as suggested by
clang-tidy's performance-unnecessary-value-param.
While we are at it, this patch updates a couple of callers. To avoid
the ambiguity in the evaluation order among the constructor arguments,
I'm calling computeAllocType before calling the constructor.
Commit: 4a7b8003012985028bdf637be0a9c7a71dff65d9
https://github.com/llvm/llvm-project/commit/4a7b8003012985028bdf637be0a9c7a71dff65d9
Author: Lang Hames <lhames at gmail.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp
Log Message:
-----------
[ORC] Switch ExecutionSession::ErrorReporter to use unique_function.
This allows the ReportError functor to hold move-only types.
Commit: f21c2fae95f76300c4230f75b6e97445932f6bc6
https://github.com/llvm/llvm-project/commit/f21c2fae95f76300c4230f75b6e97445932f6bc6
Author: hev <wangrui at loongson.cn>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/test/CodeGen/LoongArch/vector-fp-imm.ll
Log Message:
-----------
[LoongArch] Set isReMaterializable on LU{12,32,52}I.D/ADDI.D and {X}ORI instructions (#94552)
Commit: d224a034a20016272a3257f7081d02f90eb9cc78
https://github.com/llvm/llvm-project/commit/d224a034a20016272a3257f7081d02f90eb9cc78
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
Log Message:
-----------
[SCEV] Use insert_or_assign() (NFC)
Commit: 240512c43234f58b3924cd90fe0781445d97e98d
https://github.com/llvm/llvm-project/commit/240512c43234f58b3924cd90fe0781445d97e98d
Author: hev <wangrui at loongson.cn>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M llvm/lib/Target/LoongArch/CMakeLists.txt
M llvm/lib/Target/LoongArch/LoongArch.h
A llvm/lib/Target/LoongArch/LoongArchDeadRegisterDefinitions.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/test/CodeGen/LoongArch/global-address.ll
M llvm/test/CodeGen/LoongArch/intrinsic-la64.ll
M llvm/test/CodeGen/LoongArch/intrinsic.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/br.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/load-store.ll
M llvm/test/CodeGen/LoongArch/psabi-restricted-scheduling.ll
M llvm/utils/gn/secondary/llvm/lib/Target/LoongArch/BUILD.gn
Log Message:
-----------
[LoongArch] Add a pass to rewrite rd to r0 for non-computational instrs whose return values are unused (#94590)
This patch adds a peephole pass `LoongArchDeadRegisterDefinitions`. It
rewrites `rd` to `r0` when `rd` is marked as dead. It may improve the
register allocation and reduce pipeline hazards on CPUs without register
renaming and OOO.
Commit: c15b86731b78de88fadbc16ea1c2df2f60c991e9
https://github.com/llvm/llvm-project/commit/c15b86731b78de88fadbc16ea1c2df2f60c991e9
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/Opcodes.td
Log Message:
-----------
[clang][Interp][NFC] Add GetPtrFieldPop opcode
And change the previous GetPtrField to only peek() the base pointer.
We can get rid of a whole bunch of DupPtr ops this way.
Commit: e622996eddfb2826d258b3a3760eed195f97aabe
https://github.com/llvm/llvm-project/commit/e622996eddfb2826d258b3a3760eed195f97aabe
Author: Kristóf Umann <dkszelethus at gmail.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
A clang/lib/StaticAnalyzer/Checkers/NoOwnershipChangeVisitor.cpp
A clang/lib/StaticAnalyzer/Checkers/NoOwnershipChangeVisitor.h
Log Message:
-----------
[analyzer][NFC] Factor out NoOwnershipChangeVisitor (#94357)
In preparation for adding essentially the same visitor to StreamChecker,
this patch factors this visitor out to a common header.
I'll be the first to admit that the interface of these classes are not
terrific, but it rather tightly held back by its main technical debt,
which is NoStoreFuncVisitor, the main descendant of
NoStateChangeVisitor.
Change-Id: I99d73ccd93a18dd145bbbc83afadbb432dd42b90
Commit: be18daad06a9b431d0b4b787bba81de579e0a583
https://github.com/llvm/llvm-project/commit/be18daad06a9b431d0b4b787bba81de579e0a583
Author: Jianjian GUAN <jacquesguan at me.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/select-fp.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-fp.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll
Log Message:
-----------
Reland "[RISCV] Support select/merge like ops for bf16 vectors when have Zvfbfmin" (#94565)"
Commit: 8ef5c98e9f9276f09c590e22ab88a20ae86f3859
https://github.com/llvm/llvm-project/commit/8ef5c98e9f9276f09c590e22ab88a20ae86f3859
Author: uint256_t <maekawatoshiki1017 at gmail.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M llvm/docs/Benchmarking.rst
Log Message:
-----------
[docs] Fix benchmarking tips (#94724)
This PR fixes an incorrect line for setting scaling_governer in
benchmarking tips.
Commit: 36bc7410cb68e32d4416b951a118d5a799d3a226
https://github.com/llvm/llvm-project/commit/36bc7410cb68e32d4416b951a118d5a799d3a226
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M llvm/test/tools/llc/new-pm/regalloc-amdgpu.mir
Log Message:
-----------
[test] Don't generate extra file for regalloc-amdgpu.mir test.
Commit: 1c0063b58a4fc23c94c7f5bf5a937bbdf9703cc0
https://github.com/llvm/llvm-project/commit/1c0063b58a4fc23c94c7f5bf5a937bbdf9703cc0
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M clang/lib/AST/Interp/Pointer.cpp
M clang/test/AST/Interp/cxx20.cpp
Log Message:
-----------
[clang][Interp] Remove StoragKind limitation in Pointer assign operators
It's not strictly needed and did cause some test failures.
Commit: ac404632f991fc6e7dc75ef553a99676ba8002ce
https://github.com/llvm/llvm-project/commit/ac404632f991fc6e7dc75ef553a99676ba8002ce
Author: WANG Rui <wangrui at loongson.cn>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M llvm/test/CodeGen/LoongArch/machinelicm-address-pseudos.ll
Log Message:
-----------
[NFC][LoongArch] Update test for #94590
Commit: 4f320e6aa2d4fdcb3d749977c840cdf1783173f3
https://github.com/llvm/llvm-project/commit/4f320e6aa2d4fdcb3d749977c840cdf1783173f3
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M mlir/include/mlir-c/Dialect/LLVM.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrs.h
M mlir/lib/CAPI/Dialect/LLVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/DebugImporter.cpp
M mlir/lib/Target/LLVMIR/DebugImporter.h
M mlir/lib/Target/LLVMIR/DebugTranslation.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.h
M mlir/test/CAPI/llvm.c
M mlir/test/Target/LLVMIR/Import/debug-info.ll
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
Log Message:
-----------
[MLIR] Translate DIStringType. (#94480)
This PR handle translation of DIStringType. Mostly mechanical changes to
translate DIStringType to/from DIStringTypeAttr. The 'stringLength'
field is 'DIVariable' in DIStringType. As there was no `DIVariableAttr`
previously, it has been added to ease the translation.
---------
Co-authored-by: Tobias Gysi <tobias.gysi at nextsilicon.com>
Commit: 5f1adf0433c6007f8be885b832c852da67e8524c
https://github.com/llvm/llvm-project/commit/5f1adf0433c6007f8be885b832c852da67e8524c
Author: Utkarsh Saxena <usx at google.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M clang-tools-extra/clangd/FindSymbols.cpp
M clang-tools-extra/clangd/IncludeCleaner.cpp
M clang-tools-extra/clangd/SemanticHighlighting.cpp
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/refactor/Rename.cpp
M clang-tools-extra/clangd/unittests/PreambleTests.cpp
M clang-tools-extra/clangd/unittests/XRefsTests.cpp
M clang/include/clang/Tooling/Syntax/Tokens.h
M clang/lib/Tooling/Syntax/Tokens.cpp
M clang/unittests/Tooling/Syntax/TokensTest.cpp
Log Message:
-----------
[clangd] Fix crash with null check for Token at Loc (#94528)
Fixes https://github.com/llvm/llvm-project/issues/94599
Commit: 8f1164948d6b8f3d3ea11d0ee0629af82fe8cb74
https://github.com/llvm/llvm-project/commit/8f1164948d6b8f3d3ea11d0ee0629af82fe8cb74
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/CLOptions.inc
M flang/lib/Optimizer/Transforms/VScaleAttr.cpp
Log Message:
-----------
[flang][Transforms][NFC] Remove boilerplate from vscale range pass (#94598)
Use tablegen to generate the pass constructor.
This pass is supposed to add function attributes so it does not need to
operate on other top level operations.
Commit: 0749b01c81b7397f674cfe3726e13aa9dfb702ea
https://github.com/llvm/llvm-project/commit/0749b01c81b7397f674cfe3726e13aa9dfb702ea
Author: Chen Zheng <czhengsz at cn.ibm.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M llvm/test/CodeGen/PowerPC/frameaddr.ll
Log Message:
-----------
[PowerPC] modify the frameaddress case, NFC
Commit: 3453dedfaf565429bc06c6d58533926f793ad650
https://github.com/llvm/llvm-project/commit/3453dedfaf565429bc06c6d58533926f793ad650
Author: Chen Zheng <czhengsz at cn.ibm.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
M llvm/test/CodeGen/PowerPC/2010-05-03-retaddr1.ll
M llvm/test/CodeGen/PowerPC/frameaddr.ll
Log Message:
-----------
[PowerPC] return correct frame address for frameaddress intrinsic
Commit: c0b468523c9c5517e61a197e7c1fe6cb52f8999c
https://github.com/llvm/llvm-project/commit/c0b468523c9c5517e61a197e7c1fe6cb52f8999c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrNEON.td
M llvm/test/CodeGen/ARM/neon_vabd.ll
Log Message:
-----------
[ARM] Add NEON support for ISD::ABDS/ABDU nodes. (#94504)
As noted on #94466, NEON has ABDS/ABDU instructions but only handles them via intrinsics, plus some VABDL custom patterns.
This patch flags basic ABDS/ABDU for neon types as legal and updates all tablegen patterns to use abds/abdu instead.
Fixes #94466
Commit: 0d1b3671a91c3929fc3e3613491ff4b57f1adcc3
https://github.com/llvm/llvm-project/commit/0d1b3671a91c3929fc3e3613491ff4b57f1adcc3
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M .github/workflows/release-binaries.yml
M clang/cmake/caches/Release.cmake
Log Message:
-----------
[CMake][Release] Use the TXZ cpack generator for binaries (#90138)
Commit: 1721c14e8e0d75cc611067b6f4e84028ea7c47d5
https://github.com/llvm/llvm-project/commit/1721c14e8e0d75cc611067b6f4e84028ea7c47d5
Author: John Brawn <john.brawn at arm.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/BinaryFormat/Dwarf.h
M llvm/lib/BinaryFormat/Dwarf.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
A llvm/test/DebugInfo/X86/DW_OP_LLVM_extract_bits.ll
Log Message:
-----------
[DebugInfo] Add DW_OP_LLVM_extract_bits (#93990)
This operation extracts a number of bits at a given offset and sign or
zero extends them, which is done by emitting it as a left shift followed
by a right shift.
This is being added for use in clang for C++ structured bindings of
bitfields that have offset or size that aren't a byte multiple. A new
operation is being added, instead of shifts being used directly, as it
makes correctly handling it in optimisations (which will be done in a
later patch) much easier.
Commit: 192cd685129d6f42e8b191e12bddf74ade48c270
https://github.com/llvm/llvm-project/commit/192cd685129d6f42e8b191e12bddf74ade48c270
Author: Fotis Kounelis <fotisss17 at gmail.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M mlir/lib/Dialect/SCF/TransformOps/SCFTransformOps.cpp
M mlir/test/Dialect/SCF/transform-ops.mlir
Log Message:
-----------
Add checks before hoisting out in loop pipelining (#90872)
Currently, during a loop pipelining transformation, operations may be
hoisted out without any checks on the loop bounds, which leads to
incorrect transformations and unexpected behaviour. The following [issue
](https://github.com/llvm/llvm-project/issues/90870) describes the
problem more extensively, including an example.
The proposed fix adds some check in the loop bounds before and applies
the maximum hoisting.
Commit: 5d6acf8196a44225991ab2fb6dfc9cc72296b348
https://github.com/llvm/llvm-project/commit/5d6acf8196a44225991ab2fb6dfc9cc72296b348
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M clang/lib/AST/Interp/Pointer.cpp
Log Message:
-----------
[clang][Interp][NFC] Properly assign block pointer Pointee
Commit: 3a31eaeac8482fa5e242ee00cd4e77b203db539e
https://github.com/llvm/llvm-project/commit/3a31eaeac8482fa5e242ee00cd4e77b203db539e
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/AST/Interp/lambda.cpp
Log Message:
-----------
[clang][Interp] Fix refers_to_enclosing_variable_or_capture DREs
They do not count into lambda captures, so visit them lazily.
Commit: 1934c1aa3613fe2ded87ca4cd739694378e92601
https://github.com/llvm/llvm-project/commit/1934c1aa3613fe2ded87ca4cd739694378e92601
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M llvm/test/Transforms/SimplifyCFG/ARM/switch-to-lookup-table.ll
Log Message:
-----------
[SimplifyCFG] Remove bogus UTC line from test (NFC)
The check lines in this test were clearly not generated by UTC.
Commit: 8719cb88e3443bf717391b5020beab61238a372c
https://github.com/llvm/llvm-project/commit/8719cb88e3443bf717391b5020beab61238a372c
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M llvm/test/Transforms/SimplifyCFG/RISCV/switch_to_lookup_table-rv32.ll
M llvm/test/Transforms/SimplifyCFG/RISCV/switch_to_lookup_table-rv64.ll
M llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table.ll
Log Message:
-----------
[SimplifyCFG] Regenerate switch to lookup tests (NFC)
Regenerate these with --check-globals. The manual global CHECKS
get dropped during regeneration otherwise.
Annoyingly UTC insists on putting the globals directly before the
first function, so the first comment is a bit out of place now.
Commit: b87a80d4ebca9e1c065f0d2762e500078c4badca
https://github.com/llvm/llvm-project/commit/b87a80d4ebca9e1c065f0d2762e500078c4badca
Author: Mubashar Ahmad <mubashar.ahmad at arm.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/LowerVectorInterleave.cpp
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
A mlir/test/Dialect/Vector/vector-deinterleave-lowering-transforms.mlir
Log Message:
-----------
[mlir][vector] Add n-d deinterleave lowering (#94237)
This patch implements the lowering for vector
deinterleave for vector of n-dimensions. Process
involves unrolling the n-d vector to a series
of one-dimensional vectors. The deinterleave
operation is then used on these vectors.
From:
```
%0, %1 = vector.deinterleave %a : vector<2x8xi8> -> vector<2x4xi8>
```
To:
```
%cst = arith.constant dense<0> : vector<2x4xi32>
%0 = vector.extract %arg0[0] : vector<8xi32> from vector<2x8xi32>
%res1, %res2 = vector.deinterleave %0 : vector<8xi32> -> vector<4xi32>
%1 = vector.insert %res1, %cst [0] : vector<4xi32> into vector<2x4xi32>
%2 = vector.insert %res2, %cst [0] : vector<4xi32> into vector<2x4xi32>
%3 = vector.extract %arg0[1] : vector<8xi32> from vector<2x8xi32>
%res1_0, %res2_1 = vector.deinterleave %3 : vector<8xi32> -> vector<4xi32>
%4 = vector.insert %res1_0, %1 [1] : vector<4xi32> into vector<2x4xi32>
%5 = vector.insert %res2_1, %2 [1] : vector<4xi32> into vector<2x4xi32>
...etc.
```
Commit: 1a5239251ead73ee57f4e2f7fc93433ac7cf18b1
https://github.com/llvm/llvm-project/commit/1a5239251ead73ee57f4e2f7fc93433ac7cf18b1
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/CodeGenOptions.h
M clang/include/clang/Driver/Options.td
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M llvm/docs/LangRef.rst
M llvm/include/llvm/Support/CodeGen.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/TargetOptionsImpl.cpp
M llvm/lib/IR/Function.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
M llvm/lib/Target/ARM/ARMFeatures.td
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMFrameLowering.h
M llvm/test/CodeGen/ARM/frame-chain-reserved-fp.ll
M llvm/test/CodeGen/ARM/frame-chain.ll
M llvm/test/CodeGen/Thumb/frame-access.ll
M llvm/test/CodeGen/Thumb/frame-chain-reserved-fp.ll
M llvm/test/CodeGen/Thumb/frame-chain.ll
Log Message:
-----------
[ARM] r11 is reserved when using -mframe-chain=aapcs (#86951)
When using the -mframe-chain=aapcs or -mframe-chain=aapcs-leaf options,
we cannot use r11 as an allocatable register, even if
-fomit-frame-pointer is also used. This is so that r11 will always point
to a valid frame record, even if we don't create one in every function.
Commit: af3ffff34fb39cfb1e19dce68bd1c3fefda336a4
https://github.com/llvm/llvm-project/commit/af3ffff34fb39cfb1e19dce68bd1c3fefda336a4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrNEON.td
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.bf.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
M llvm/test/CodeGen/X86/pr38539.ll
Log Message:
-----------
[DAG] Always allow folding XOR patterns to ABS pre-legalization (#94601)
Removes residual ARM handling for vXi64 ABS nodes to prevent infinite loops.
Commit: fd45dcca26d6031fcbaa907d8d6c0d9755b36699
https://github.com/llvm/llvm-project/commit/fd45dcca26d6031fcbaa907d8d6c0d9755b36699
Author: Eisuke Kawashima <e.kawaschima+github at gmail.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M mlir/test/python/ir/affine_expr.py
M mlir/test/python/ir/attributes.py
M mlir/test/python/ir/builtin_types.py
Log Message:
-----------
fix(mlir/**.py): fix comparison to None (#94019)
from PEP8
(https://peps.python.org/pep-0008/#programming-recommendations):
> Comparisons to singletons like None should always be done with is or
is not, never the equality operators.
Co-authored-by: Eisuke Kawashima <e-kwsm at users.noreply.github.com>
Commit: 917afa883258757575ac6448e83a9233d7877333
https://github.com/llvm/llvm-project/commit/917afa883258757575ac6448e83a9233d7877333
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/test/Misc/target-invalid-cpu-note.c
M llvm/docs/ReleaseNotes.rst
M llvm/include/llvm/TargetParser/ARMTargetParser.def
M llvm/lib/Target/ARM/ARMProcessors.td
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/test/CodeGen/ARM/build-attributes.ll
M llvm/test/CodeGen/ARM/cortexr52-misched-basic.ll
M llvm/test/CodeGen/ARM/lsr-scale-addr-mode.ll
M llvm/test/CodeGen/ARM/misched-fp-basic.ll
M llvm/test/CodeGen/ARM/misched-int-basic-thumb2.mir
M llvm/test/CodeGen/ARM/misched-int-basic.mir
M llvm/test/CodeGen/ARM/proc-resource-sched.ll
M llvm/test/CodeGen/ARM/single-issue-r52.mir
M llvm/test/CodeGen/ARM/useaa.ll
M llvm/test/MC/ARM/dfb-neg.s
M llvm/test/MC/ARM/dfb.s
A llvm/test/MC/ARM/invalid-armv8r.s
M llvm/test/MC/ARM/thumb-hints.s
M llvm/test/MC/Disassembler/ARM/dfb-thumb.txt
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[ARM] Add support for Cortex-R52+ (#94633)
Cortex-R52+ is an Armv8-R AArch32 CPU.
Technical Reference Manual for Cortex-R52+:
https://developer.arm.com/documentation/102199/latest/
Commit: 537165bb02df8e9f4dc4c21725d50e77e2908a5f
https://github.com/llvm/llvm-project/commit/537165bb02df8e9f4dc4c21725d50e77e2908a5f
Author: WANG Rui <wangrui at loongson.cn>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
Log Message:
-----------
[NFC][LoongArch] Update test for #94590
Commit: 54c5dbe7c3812461decbccb6ed122e41777e02bd
https://github.com/llvm/llvm-project/commit/54c5dbe7c3812461decbccb6ed122e41777e02bd
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M clang/unittests/Interpreter/InterpreterTest.cpp
Log Message:
-----------
[clang][test] Skip interpreter value test on Arm 32 bit
https://github.com/llvm/llvm-project/pull/89811 caused this test to fail,
somehow.
I think it may not be at fault, but actually be exposing some
existing undefined behaviour, see
https://github.com/llvm/llvm-project/issues/94741.
Skipping this for now to get the bots green again.
Commit: d3e531cf37ed5334aa873e4e46aff693efac9d77
https://github.com/llvm/llvm-project/commit/d3e531cf37ed5334aa873e4e46aff693efac9d77
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
Log Message:
-----------
[gn build] Port e622996eddfb
Commit: 6fe5428ecbd18aa263417a244c0850b1271617c0
https://github.com/llvm/llvm-project/commit/6fe5428ecbd18aa263417a244c0850b1271617c0
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Flang.cpp
Log Message:
-----------
[Flang] Handle the newly-added "Reserved" FramePointerKind for 1a5239251ead73ee57f4e2f7fc93433ac7cf18b1
Commit: 88e2bb40921f35663e16e45514de20018615c36f
https://github.com/llvm/llvm-project/commit/88e2bb40921f35663e16e45514de20018615c36f
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/SPIR.cpp
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/target-data.c
A clang/test/CodeGenCUDA/builtins-spirv-amdgcn.cu
A clang/test/CodeGenCUDA/builtins-unsafe-atomics-spirv-amdgcn-gfx90a.cu
M clang/test/CodeGenCUDA/long-double.cu
A clang/test/CodeGenCUDA/spirv-amdgcn-bf16.cu
A clang/test/CodeGenCXX/spirv-amdgcn-float16.cpp
M clang/test/CodeGenHIP/hipspv-addr-spaces.cpp
A clang/test/CodeGenHIP/spirv-amdgcn-ballot.cpp
A clang/test/CodeGenHIP/spirv-amdgcn-dpp-const-fold.hip
A clang/test/CodeGenHIP/spirv-amdgcn-half.hip
M clang/test/CodeGenOpenCL/amdgcn-flat-scratch-name.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx10.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M clang/test/CodeGenOpenCL/inline-asm-amdgcn.cl
M clang/test/Preprocessor/hash_builtin.cpp
M clang/test/Preprocessor/predefined-macros-no-warnings.c
M clang/test/Preprocessor/predefined-macros.c
A clang/test/Sema/builtin-spirv-amdgcn-atomic-inc-dec-failure.cpp
A clang/test/Sema/inline-asm-validate-spirv-amdgcn.cl
M clang/test/SemaCUDA/allow-int128.cu
M clang/test/SemaCUDA/amdgpu-f128.cu
M clang/test/SemaCUDA/float16.cu
M clang/test/SemaCUDA/fp16-arg-return.cu
A clang/test/SemaCUDA/spirv-amdgcn-atomic-ops.cu
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx908-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx90a-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx940-param.cl
M llvm/docs/SPIRVUsage.rst
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_subgroup_rotate/subgroup-rotate.ll
M llvm/test/CodeGen/SPIRV/passes/SPIRVEmitIntrinsics-no-divergent-spv_assign_ptr_type.ll
M llvm/test/CodeGen/SPIRV/passes/SPIRVEmitIntrinsics-no-duplicate-spv_assign_type.ll
M llvm/test/CodeGen/SPIRV/transcoding/builtin_vars_arithmetics.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_non_uniform_vote.ll
Log Message:
-----------
[clang][SPIR-V] Add support for AMDGCN flavoured SPIRV (#89796)
This change seeks to add support for vendor flavoured SPIRV - more
specifically, AMDGCN flavoured SPIRV. The aim is to generate SPIRV that
carries some extra bits of information that are only usable by AMDGCN
targets, forfeiting absolute genericity to obtain greater expressiveness
for target features:
- AMDGCN inline ASM is allowed/supported, under the assumption that the
[SPV_INTEL_inline_assembly](https://github.com/intel/llvm/blob/sycl/sycl/doc/design/spirv-extensions/SPV_INTEL_inline_assembly.asciidoc)
extension is enabled/used
- AMDGCN target specific builtins are allowed/supported, under the
assumption that e.g. the `--spirv-allow-unknown-intrinsics` option is
enabled when using the downstream translator
- the featureset matches the union of AMDGCN targets' features
- the datalayout string is overspecified to affix both the program
address space and the alloca address space, the latter under the
assumption that the
[SPV_INTEL_function_pointers](https://github.com/intel/llvm/blob/sycl/sycl/doc/design/spirv-extensions/SPV_INTEL_function_pointers.asciidoc)
extension is enabled/used, case in which the extant SPIRV datalayout
string would lead to pointers to function pointing to the private
address space, which would be wrong.
Existing AMDGCN tests are extended to cover this new target. It is
currently dormant / will require some additional changes, but I thought
I'd rather put it up for review to get feedback as early as possible. I
will note that an alternative option is to place this under AMDGPU, but
that seems slightly less natural, since this is still SPIRV, albeit
relaxed in terms of preconditions & constrained in terms of
postconditions, and only guaranteed to be usable on AMDGCN targets (it
is still possible to obtain pristine portable SPIRV through usage of the
flavoured target, though).
Commit: 3fefb3c598db995433093ed158c08368809b3f78
https://github.com/llvm/llvm-project/commit/3fefb3c598db995433093ed158c08368809b3f78
Author: Nathan Sidwell <nathan at acm.org>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Passes/VeneerElimination.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
Log Message:
-----------
[BOLT][NFC] Infailable fns return void (#92018)
Both `reverseBranchCondition` and `replaceBranchTarget` return a success boolean. But all-but-one caller ignores the return value, and the exception emits a fatal error on failure.
Thus, just return nothing.
Commit: 74d62c2f73799ea6ffbf165ff752ca0b0f826eca
https://github.com/llvm/llvm-project/commit/74d62c2f73799ea6ffbf165ff752ca0b0f826eca
Author: aengelke <engelke at in.tum.de>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[CodeGen][SDAG] Remove CombinedNodes SmallPtrSet (#94609)
This "small" set grows quite large and it's more performant to store
whether a node has been combined before in the node itself.
As this information is only relevant for nodes that are currently not in
the worklist, add a second state to the CombinerWorklistIndex (-2) to
indicate that a node is currently not in a worklist, but was combined
before.
This brings a substantial performance improvement.
Commit: 9ece3eb1459309f9fbd18ce8ec8f771c238e8815
https://github.com/llvm/llvm-project/commit/9ece3eb1459309f9fbd18ce8ec8f771c238e8815
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M clang/lib/AST/Interp/EvalEmitter.cpp
M clang/lib/AST/Interp/EvaluationResult.cpp
M clang/test/AST/Interp/cxx20.cpp
Log Message:
-----------
[clang][Interp] Check ConstantExpr results for initialization
They need to be fully initialized, similar to global variables.
Commit: 9eb8a130c5d708dbabe824113add072436ae9997
https://github.com/llvm/llvm-project/commit/9eb8a130c5d708dbabe824113add072436ae9997
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M clang/lib/AST/Interp/MemberPointer.h
Log Message:
-----------
[clang][Interp][NFC] Fix a const-correctness warning
Commit: b8cc85b318c0dd89e4dd69e3691ffcad5e401885
https://github.com/llvm/llvm-project/commit/b8cc85b318c0dd89e4dd69e3691ffcad5e401885
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/AST/Interp/lambda.cpp
Log Message:
-----------
[clang][Interp] Limit lambda capture lazy visting to actual captures
Check this by looking at the VarDecl.
Commit: 5a0181f568e56e37df80d0f74eca4775776fa8cd
https://github.com/llvm/llvm-project/commit/5a0181f568e56e37df80d0f74eca4775776fa8cd
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M clang/include/clang/AST/ASTUnresolvedSet.h
M clang/include/clang/AST/DeclAccessPair.h
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/AST/DeclID.h
M clang/include/clang/AST/UnresolvedSet.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/Serialization/ModuleManager.h
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ModuleFile.cpp
A clang/test/Modules/no-transitive-decls-change.cppm
Log Message:
-----------
[serialization] no transitive decl change (#92083)
Following of https://github.com/llvm/llvm-project/pull/86912
The motivation of the patch series is that, for a module interface unit
`X`, when the dependent modules of `X` changes, if the changes is not
relevant with `X`, we hope the BMI of `X` won't change. For the specific
patch, we hope if the changes was about irrelevant declaration changes,
we hope the BMI of `X` won't change. **However**, I found the patch
itself is not very useful in practice, since the adding or removing
declarations, will change the state of identifiers and types in most
cases.
That said, for the most simple example,
```
// partA.cppm
export module m:partA;
// partA.v1.cppm
export module m:partA;
export void a() {}
// partB.cppm
export module m:partB;
export void b() {}
// m.cppm
export module m;
export import :partA;
export import :partB;
// onlyUseB;
export module onlyUseB;
import m;
export inline void onluUseB() {
b();
}
```
the BMI of `onlyUseB` will change after we change the implementation of
`partA.cppm` to `partA.v1.cppm`. Since `partA.v1.cppm` introduces new
identifiers and types (the function prototype).
So in this patch, we have to write the tests as:
```
// partA.cppm
export module m:partA;
export int getA() { ... }
export int getA2(int) { ... }
// partA.v1.cppm
export module m:partA;
export int getA() { ... }
export int getA(int) { ... }
export int getA2(int) { ... }
// partB.cppm
export module m:partB;
export void b() {}
// m.cppm
export module m;
export import :partA;
export import :partB;
// onlyUseB;
export module onlyUseB;
import m;
export inline void onluUseB() {
b();
}
```
so that the new introduced declaration `int getA(int)` doesn't introduce
new identifiers and types, then the BMI of `onlyUseB` can keep
unchanged.
While it looks not so great, the patch should be the base of the patch
to erase the transitive change for identifiers and types since I don't
know how can we introduce new types and identifiers without introducing
new declarations. Given how tightly the relationship between
declarations, types and identifiers, I think we can only reach the ideal
state after we made the series for all of the three entties.
The design of the patch is similar to
https://github.com/llvm/llvm-project/pull/86912, which extends the
32-bit DeclID to 64-bit and use the higher bits to store the module file
index and the lower bits to store the Local Decl ID.
A slight difference is that we only use 48 bits to store the new DeclID
since we try to use the higher 16 bits to store the module ID in the
prefix of Decl class. Previously, we use 32 bits to store the module ID
and 32 bits to store the DeclID. I don't want to allocate additional
space so I tried to make the additional space the same as 64 bits. An
potential interesting thing here is about the relationship between the
module ID and the module file index. I feel we can get the module file
index by the module ID. But I didn't prove it or implement it. Since I
want to make the patch itself as small as possible. We can make it in
the future if we want.
Another change in the patch is the new concept Decl Index, which means
the index of the very big array `DeclsLoaded` in ASTReader. Previously,
the index of a loaded declaration is simply the Decl ID minus
PREDEFINED_DECL_NUMs. So there are some places they got used
ambiguously. But this patch tried to split these two concepts.
As https://github.com/llvm/llvm-project/pull/86912 did, the change will
increase the on-disk PCM file sizes. As the declaration ID may be the
most IDs in the PCM file, this can have the biggest impact on the size.
In my experiments, this change will bring 6.6% increase of the on-disk
PCM size. No compile-time performance regression observed. Given the
benefits in the motivation example, I think the cost is worthwhile.
Commit: df6750eaa80099a1e96439bc060a18a26d7212e6
https://github.com/llvm/llvm-project/commit/df6750eaa80099a1e96439bc060a18a26d7212e6
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/test/CodeGen/AMDGPU/wqm.ll
Log Message:
-----------
[AMDGPU] Fix interaction between WQM and llvm.amdgcn.init.exec (#93680)
Whole quad mode requires inserting a copy of the initial EXEC mask. In a
function that also uses llvm.amdgcn.init.exec, insert the COPY after
initializing EXEC.
Commit: acc927ac2369605c4ec9268d542bb51072d73794
https://github.com/llvm/llvm-project/commit/acc927ac2369605c4ec9268d542bb51072d73794
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[Frontend][OpenMP] Sort all the things in OMP.td, NFC (#94653)
The file OMP.td is becoming tedious to update by hand due to the
seemingly random ordering of various items in it. This patch brings
order to it by sorting most of the contents.
The clause definitions are sorted alphabetically with respect to the
spelling of the clause.[1]
The directive definitions are split into two leaf directives and
compound directives.[2] Within each, definitions are sorted
alphabetically with respect to the spelling, with the exception that
"end xyz" directives are placed immediately following the definition of
"xyz".[3]
Within each directive definition, the lists of clauses are also sorted
alphabetically.
[1] All spellings are made of lowercase letters, _, or space. Ordering
that includes non-letters follows the order assumed by the `sort`
utility.
[2] Compound directives refer to the consituent leaf directives, hence
the leaf definitions must come first.
[3] Some of the "end xyz" directives have properties derived from the
corresponding "xyz" directive. This exception guarantees that "xyz"
precedes the "end xyz".
Commit: 9c56724a2d353fb3ea65969c633ba3e256694970
https://github.com/llvm/llvm-project/commit/9c56724a2d353fb3ea65969c633ba3e256694970
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-06-07 (Fri, 07 Jun 2024)
Changed paths:
M .github/workflows/containers/github-action-ci/stage1.Dockerfile
M .github/workflows/release-binaries.yml
A bolt/include/bolt/Core/GDBIndex.h
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Core/CMakeLists.txt
A bolt/lib/Core/GDBIndex.cpp
M bolt/lib/Passes/VeneerElimination.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
M clang-tools-extra/clang-tidy/misc/CMakeLists.txt
M clang-tools-extra/clang-tidy/misc/HeaderIncludeCycleCheck.cpp
M clang-tools-extra/clang-tidy/readability/ContainerSizeEmptyCheck.cpp
M clang-tools-extra/clangd/FindSymbols.cpp
M clang-tools-extra/clangd/IncludeCleaner.cpp
M clang-tools-extra/clangd/SemanticHighlighting.cpp
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/refactor/Rename.cpp
M clang-tools-extra/clangd/unittests/PreambleTests.cpp
M clang-tools-extra/clangd/unittests/XRefsTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-tidy/checkers/misc/header-include-cycle.self.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/container-size-empty.cpp
M clang/cmake/caches/Release.cmake
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTUnresolvedSet.h
M clang/include/clang/AST/DeclAccessPair.h
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/AST/DeclID.h
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/UnresolvedSet.h
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/CodeGenOptions.h
M clang/include/clang/Basic/Cuda.h
M clang/include/clang/Basic/DiagnosticOptions.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenACCClauses.def
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/Driver/Options.td
M clang/include/clang/Lex/DependencyDirectivesScanner.h
M clang/include/clang/Sema/Initialization.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/Serialization/ModuleManager.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningFilesystem.h
M clang/include/clang/Tooling/Syntax/Tokens.h
M clang/lib/AST/CMakeLists.txt
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.h
M clang/lib/AST/Interp/Context.cpp
M clang/lib/AST/Interp/Context.h
M clang/lib/AST/Interp/Descriptor.cpp
M clang/lib/AST/Interp/Disasm.cpp
M clang/lib/AST/Interp/EvalEmitter.cpp
M clang/lib/AST/Interp/EvaluationResult.cpp
M clang/lib/AST/Interp/Function.cpp
M clang/lib/AST/Interp/Interp.cpp
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/InterpFrame.cpp
M clang/lib/AST/Interp/InterpStack.cpp
M clang/lib/AST/Interp/InterpStack.h
A clang/lib/AST/Interp/MemberPointer.cpp
A clang/lib/AST/Interp/MemberPointer.h
M clang/lib/AST/Interp/Opcodes.td
M clang/lib/AST/Interp/Pointer.cpp
M clang/lib/AST/Interp/Pointer.h
M clang/lib/AST/Interp/PrimType.cpp
M clang/lib/AST/Interp/PrimType.h
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/ParentMap.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Analysis/CFG.cpp
M clang/lib/Basic/Cuda.cpp
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/Basic/Targets/SPIR.cpp
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/ExtractAPI/Serialization/SymbolGraphSerializer.cpp
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Interpreter/IncrementalParser.cpp
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Lex/DependencyDirectivesScanner.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Sema/Scope.cpp
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/lib/Sema/SemaAvailability.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ModuleFile.cpp
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
A clang/lib/StaticAnalyzer/Checkers/NoOwnershipChangeVisitor.cpp
A clang/lib/StaticAnalyzer/Checkers/NoOwnershipChangeVisitor.h
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningFilesystem.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/Syntax/Tokens.cpp
M clang/test/AST/Interp/arrays.cpp
M clang/test/AST/Interp/cxx20.cpp
M clang/test/AST/Interp/cxx23.cpp
M clang/test/AST/Interp/eval-order.cpp
M clang/test/AST/Interp/lambda.cpp
M clang/test/AST/Interp/literals.cpp
A clang/test/AST/Interp/memberpointers.cpp
M clang/test/AST/ast-dump-default-init-json.cpp
M clang/test/AST/ast-dump-default-init.cpp
M clang/test/Analysis/cxx-uninitialized-object.cpp
M clang/test/Analysis/lifetime-extended-regions.cpp
M clang/test/CXX/drs/cwg16xx.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/special/class.temporary/p6.cpp
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vcpopv.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vcpopv.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vcpopv.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vcpopv.c
M clang/test/CodeGen/target-data.c
A clang/test/CodeGen/voidptr-vaarg.c
A clang/test/CodeGenCUDA/builtins-spirv-amdgcn.cu
A clang/test/CodeGenCUDA/builtins-unsafe-atomics-spirv-amdgcn-gfx90a.cu
M clang/test/CodeGenCUDA/cuda-builtin-vars.cu
M clang/test/CodeGenCUDA/long-double.cu
A clang/test/CodeGenCUDA/spirv-amdgcn-bf16.cu
A clang/test/CodeGenCXX/inline-then-fold-variadics.cpp
M clang/test/CodeGenCXX/pointers-to-data-members.cpp
A clang/test/CodeGenCXX/spirv-amdgcn-float16.cpp
M clang/test/CodeGenCXX/template-param-objects-linkage.cpp
M clang/test/CodeGenHIP/hipspv-addr-spaces.cpp
A clang/test/CodeGenHIP/spirv-amdgcn-ballot.cpp
A clang/test/CodeGenHIP/spirv-amdgcn-dpp-const-fold.hip
A clang/test/CodeGenHIP/spirv-amdgcn-half.hip
M clang/test/CodeGenOpenCL/amdgcn-flat-scratch-name.cl
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx10.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M clang/test/CodeGenOpenCL/inline-asm-amdgcn.cl
A clang/test/Driver/aarch64-oryon-1.c
M clang/test/Driver/amdgpu-macros.cl
M clang/test/Driver/amdgpu-mcpu.cl
R clang/test/Driver/loongarch-default-features.c
A clang/test/Driver/loongarch-features.c
A clang/test/Interpreter/pretty-print.c
M clang/test/Misc/target-invalid-cpu-note.c
A clang/test/Modules/no-transitive-decls-change.cppm
M clang/test/Preprocessor/hash_builtin.cpp
M clang/test/Preprocessor/predefined-macros-no-warnings.c
M clang/test/Preprocessor/predefined-macros.c
A clang/test/Sema/attr-availability-macosx.cpp
A clang/test/Sema/builtin-spirv-amdgcn-atomic-inc-dec-failure.cpp
A clang/test/Sema/inline-asm-validate-spirv-amdgcn.cl
M clang/test/SemaCUDA/allow-int128.cu
M clang/test/SemaCUDA/amdgpu-f128.cu
M clang/test/SemaCUDA/float16.cu
M clang/test/SemaCUDA/fp16-arg-return.cu
A clang/test/SemaCUDA/spirv-amdgcn-atomic-ops.cu
M clang/test/SemaCXX/attr-weak.cpp
A clang/test/SemaCXX/builtin-is-bitwise-cloneable-fsanitize.cpp
A clang/test/SemaCXX/builtin-is-bitwise-cloneable.cpp
M clang/test/SemaCXX/constexpr-default-arg.cpp
M clang/test/SemaCXX/cxx11-default-member-initializers.cpp
M clang/test/SemaCXX/eval-crashes.cpp
M clang/test/SemaCXX/nullptr_in_arithmetic_ops.cpp
M clang/test/SemaObjCXX/arc-type-traits.mm
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx908-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx90a-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx940-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-gfx940-err.cl
M clang/tools/clang-format/ClangFormat.cpp
M clang/unittests/AST/Interp/toAPValue.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Interpreter/InterpreterTest.cpp
M clang/unittests/Lex/DependencyDirectivesScannerTest.cpp
M clang/unittests/Lex/PPDependencyDirectivesTest.cpp
M clang/unittests/Tooling/Syntax/TokensTest.cpp
M clang/www/cxx_dr_status.html
M compiler-rt/lib/builtins/atomic.c
M compiler-rt/lib/sanitizer_common/sanitizer_bitvector.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
M compiler-rt/lib/sanitizer_common/tests/sanitizer_allocator_test.cpp
A compiler-rt/test/dfsan/sscanf.c
M flang/cmake/modules/AddFlangOffloadRuntime.cmake
M flang/docs/Intrinsics.md
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/Command.h
M flang/include/flang/Optimizer/Dialect/FIRAttr.td
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Runtime/command.h
M flang/include/flang/Runtime/magic-numbers.h
M flang/include/flang/Tools/CLOptions.inc
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Lower/OpenMP/DataSharingProcessor.h
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/MutableBox.cpp
M flang/lib/Optimizer/Builder/Runtime/Command.cpp
M flang/lib/Optimizer/Dialect/FIRAttr.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Transforms/ExternalNameConversion.cpp
M flang/lib/Optimizer/Transforms/VScaleAttr.cpp
M flang/runtime/command.cpp
M flang/runtime/stat.h
A flang/test/Fir/loop03.fir
A flang/test/Lower/HLFIR/assumed-rank-inquiries.f90
A flang/test/Lower/Intrinsics/getcwd-function.f90
A flang/test/Lower/Intrinsics/getcwd-optional.f90
A flang/test/Lower/Intrinsics/getcwd.f90
M flang/test/Lower/OpenMP/critical.f90
M flang/test/Lower/OpenMP/map-component-ref.f90
A flang/test/Semantics/getcwd.f90
M libc/config/gpu/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/c23.rst
M libc/docs/math/index.rst
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/atexithandler_t.h
M libc/spec/stdc.td
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/type_traits.h
A libc/src/__support/CPP/type_traits/aligned_storage.h
M libc/src/__support/fixedvector.h
M libc/src/math/CMakeLists.txt
A libc/src/math/fmaxf16.h
A libc/src/math/fmaximum_mag_numf16.h
A libc/src/math/fmaximum_magf16.h
A libc/src/math/fmaximum_numf16.h
A libc/src/math/fmaximumf16.h
A libc/src/math/fminf16.h
A libc/src/math/fminimum_mag_numf16.h
A libc/src/math/fminimum_magf16.h
A libc/src/math/fminimum_numf16.h
A libc/src/math/fminimumf16.h
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/fmaxf16.cpp
A libc/src/math/generic/fmaximum_mag_numf16.cpp
A libc/src/math/generic/fmaximum_magf16.cpp
A libc/src/math/generic/fmaximum_numf16.cpp
A libc/src/math/generic/fmaximumf16.cpp
A libc/src/math/generic/fminf16.cpp
A libc/src/math/generic/fminimum_mag_numf16.cpp
A libc/src/math/generic/fminimum_magf16.cpp
A libc/src/math/generic/fminimum_numf16.cpp
A libc/src/math/generic/fminimumf16.cpp
A libc/src/math/generic/nextafterf16.cpp
A libc/src/math/generic/nextdownf16.cpp
A libc/src/math/generic/nexttowardf16.cpp
A libc/src/math/generic/nextupf16.cpp
A libc/src/math/nextafterf16.h
A libc/src/math/nextdownf16.h
A libc/src/math/nexttowardf16.h
A libc/src/math/nextupf16.h
M libc/src/stdlib/CMakeLists.txt
A libc/src/stdlib/at_quick_exit.cpp
A libc/src/stdlib/at_quick_exit.h
M libc/src/stdlib/atexit.cpp
M libc/src/stdlib/atexit.h
A libc/src/stdlib/exit_handler.cpp
A libc/src/stdlib/exit_handler.h
M libc/src/stdlib/quick_exit.cpp
M libc/src/sys/epoll/linux/CMakeLists.txt
M libc/src/sys/epoll/linux/epoll_pwait.cpp
M libc/src/sys/epoll/linux/epoll_pwait2.cpp
M libc/src/sys/epoll/linux/epoll_wait.cpp
M libc/test/CMakeLists.txt
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/CPP/type_traits_test.cpp
M libc/test/src/__support/fixedvector_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/math/smoke/FMaxTest.h
M libc/test/src/math/smoke/FMaximumMagNumTest.h
M libc/test/src/math/smoke/FMaximumMagTest.h
M libc/test/src/math/smoke/FMaximumNumTest.h
M libc/test/src/math/smoke/FMaximumTest.h
M libc/test/src/math/smoke/FMinTest.h
M libc/test/src/math/smoke/FMinimumMagNumTest.h
M libc/test/src/math/smoke/FMinimumMagTest.h
M libc/test/src/math/smoke/FMinimumNumTest.h
M libc/test/src/math/smoke/FMinimumTest.h
M libc/test/src/math/smoke/NextAfterTest.h
M libc/test/src/math/smoke/NextTowardTest.h
A libc/test/src/math/smoke/fmaxf16_test.cpp
A libc/test/src/math/smoke/fmaximum_mag_numf16_test.cpp
A libc/test/src/math/smoke/fmaximum_magf16_test.cpp
A libc/test/src/math/smoke/fmaximum_numf16_test.cpp
A libc/test/src/math/smoke/fmaximumf16_test.cpp
A libc/test/src/math/smoke/fminf16_test.cpp
A libc/test/src/math/smoke/fminimum_mag_numf16_test.cpp
A libc/test/src/math/smoke/fminimum_magf16_test.cpp
A libc/test/src/math/smoke/fminimum_numf16_test.cpp
A libc/test/src/math/smoke/fminimumf16_test.cpp
A libc/test/src/math/smoke/nextafterf16_test.cpp
A libc/test/src/math/smoke/nextdownf16_test.cpp
A libc/test/src/math/smoke/nexttowardf16_test.cpp
A libc/test/src/math/smoke/nextupf16_test.cpp
M libc/test/src/stdlib/CMakeLists.txt
A libc/test/src/stdlib/at_quick_exit_test.cpp
M libclc/CMakeLists.txt
M libcxx/.clang-tidy
M libcxx/docs/Hardening.rst
M libcxx/docs/ReleaseNotes/18.rst
M libcxx/docs/TestingLibcxx.rst
M libcxx/include/__configuration/abi.h
M libcxx/include/__functional/bind.h
M libcxx/include/__mdspan/extents.h
M libcxx/include/__type_traits/datasizeof.h
M libcxx/test/std/experimental/simd/simd.class/simd_copy.pass.cpp
M lld/ELF/Writer.cpp
M lld/test/ELF/linkerscript/memory-nonalloc-no-warn.test
M lld/test/ELF/linkerscript/sections-nonalloc.s
M lld/test/ELF/linkerscript/sections.s
M lld/test/ELF/relocatable-comdat.s
M lldb/examples/python/crashlog.py
M lldb/examples/python/crashlog_scripted_process.py
M lldb/include/lldb/Core/ValueObject.h
M lldb/include/lldb/Core/ValueObjectConstResult.h
M lldb/include/lldb/Core/ValueObjectConstResultCast.h
M lldb/include/lldb/Core/ValueObjectConstResultChild.h
M lldb/include/lldb/Core/ValueObjectConstResultImpl.h
M lldb/include/lldb/Core/ValueObjectRegister.h
M lldb/include/lldb/Core/ValueObjectVTable.h
M lldb/source/Core/ValueObject.cpp
M lldb/source/Core/ValueObjectConstResult.cpp
M lldb/source/Core/ValueObjectConstResultCast.cpp
M lldb/source/Core/ValueObjectConstResultChild.cpp
M lldb/source/Core/ValueObjectConstResultImpl.cpp
M lldb/source/Core/ValueObjectRegister.cpp
M lldb/source/Core/ValueObjectVTable.cpp
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParser.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/source/Plugins/SymbolFile/DWARF/DebugNamesDWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDebugMap.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.h
M lldb/source/Plugins/SymbolFile/DWARF/UniqueDWARFASTType.cpp
M lldb/source/Plugins/SymbolFile/DWARF/UniqueDWARFASTType.h
M lldb/source/Target/Statistics.cpp
M lldb/source/Target/ThreadPlanStepOverRange.cpp
M lldb/test/API/functionalities/stats_api/TestStatisticsAPI.py
A lldb/test/API/lang/c/inlines/Makefile
M lldb/test/API/lang/c/inlines/TestRedefinitionsInInlines.py
M lldb/test/API/lang/c/inlines/main.c
M lldb/test/API/tools/lldb-server/TestPtyServer.py
M lldb/test/Shell/ScriptInterpreter/Python/Crashlog/app_specific_backtrace_crashlog.test
M lldb/test/Shell/ScriptInterpreter/Python/Crashlog/interactive_crashlog_invalid_target.test
M lldb/test/Shell/ScriptInterpreter/Python/Crashlog/interactive_crashlog_json.test
M lldb/test/Shell/ScriptInterpreter/Python/Crashlog/interactive_crashlog_legacy.test
M lldb/test/Shell/ScriptInterpreter/Python/Crashlog/last_exception_backtrace_crashlog.test
M lldb/test/Shell/ScriptInterpreter/Python/Crashlog/lit.local.cfg
M lldb/test/Shell/ScriptInterpreter/Python/Crashlog/skipped_status_interactive_crashlog.test
R lldb/test/Shell/SymbolFile/DWARF/delayed-definition-die-searching.test
A lldb/test/Shell/SymbolFile/DWARF/x86/simple-template-names-context.cpp
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/Benchmarking.rst
M llvm/docs/LangRef.rst
M llvm/docs/ReleaseNotes.rst
M llvm/docs/SPIRVUsage.rst
M llvm/include/llvm/Analysis/CodeMetrics.h
M llvm/include/llvm/Analysis/LoopInfo.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/include/llvm/AsmParser/LLToken.h
M llvm/include/llvm/BinaryFormat/Dwarf.h
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/MachinePassManager.h
A llvm/include/llvm/CodeGen/RegAllocFast.h
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/include/llvm/CodeGen/ScheduleDAG.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/IR/CallingConv.h
M llvm/include/llvm/IR/IRBuilderFolder.h
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Operator.h
M llvm/include/llvm/IR/RuntimeLibcalls.def
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/MCSymbolWasm.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/include/llvm/Support/CodeGen.h
M llvm/include/llvm/Support/Endian.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/include/llvm/Target/TargetOptions.h
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/include/llvm/TargetParser/ARMTargetParser.def
M llvm/include/llvm/TargetParser/TargetParser.h
A llvm/include/llvm/Transforms/IPO/ExpandVariadics.h
M llvm/include/llvm/Transforms/Utils/UnrollLoop.h
M llvm/lib/Analysis/CodeMetrics.cpp
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/BinaryFormat/Dwarf.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelperVectorOps.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TargetOptionsImpl.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/Function.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/MC/MCSection.cpp
M llvm/lib/MC/WasmObjectWriter.cpp
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/lib/ProfileData/MemProf.cpp
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64CallingConvention.td
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
A llvm/lib/Target/AArch64/AArch64SchedOryon.td
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUMemoryUtils.h
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
M llvm/lib/Target/ARM/ARMFeatures.td
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMFrameLowering.h
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrNEON.td
M llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
M llvm/lib/Target/ARM/ARMProcessors.td
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/LoongArch/CMakeLists.txt
M llvm/lib/Target/LoongArch/LoongArch.h
A llvm/lib/Target/LoongArch/LoongArchDeadRegisterDefinitions.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTX.h
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/lib/Target/NVPTX/NVVMIntrRange.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCFastISel.cpp
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVMergeRegionExitTargets.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyUtilities.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAMX.td
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/Target/X86/X86LowerTileCopy.cpp
M llvm/lib/Target/X86/X86MachineFunctionInfo.h
M llvm/lib/Target/X86/X86SchedIceLake.td
M llvm/lib/Target/X86/X86SchedSkylakeServer.td
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/lib/Transforms/IPO/CMakeLists.txt
A llvm/lib/Transforms/IPO/ExpandVariadics.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollAndJamPass.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/LoopRotationUtils.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Analysis/ScalarEvolution/trip-count-unknown-stride.ll
A llvm/test/CodeGen/AArch64/GlobalISel/combine-vscale.mir
M llvm/test/CodeGen/AArch64/arm64-2011-10-18-LdStOptBug.ll
M llvm/test/CodeGen/AArch64/arm64-ldp-cluster.ll
M llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions-predicated-scalable.ll
M llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions-scalable.ll
M llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions.ll
M llvm/test/CodeGen/AArch64/fast-regalloc-empty-bb-with-liveins.mir
M llvm/test/CodeGen/AArch64/sme-support-routines-calling-convention.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmax-legalization.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmin-legalization.ll
M llvm/test/CodeGen/AArch64/zext-to-tbl.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
A llvm/test/CodeGen/AMDGPU/build_vector-r600.ll
M llvm/test/CodeGen/AMDGPU/build_vector.ll
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
A llvm/test/CodeGen/AMDGPU/expand-variadic-call.ll
A llvm/test/CodeGen/AMDGPU/fabs-r600.ll
M llvm/test/CodeGen/AMDGPU/fabs.ll
M llvm/test/CodeGen/AMDGPU/fast-ra-kills-vcc.mir
M llvm/test/CodeGen/AMDGPU/fast-regalloc-bundles.mir
M llvm/test/CodeGen/AMDGPU/fastregalloc-illegal-subreg-physreg.mir
M llvm/test/CodeGen/AMDGPU/fastregalloc-self-loop-heuristic.mir
M llvm/test/CodeGen/AMDGPU/fmaximum3.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.ll
A llvm/test/CodeGen/AMDGPU/fneg-fabs-r600.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
M llvm/test/CodeGen/AMDGPU/fneg.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.bf.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.read.local.size.ll
M llvm/test/CodeGen/AMDGPU/occupancy-levels.ll
M llvm/test/CodeGen/AMDGPU/packed-op-sel.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.mir
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr.mir
M llvm/test/CodeGen/AMDGPU/spill192.mir
M llvm/test/CodeGen/AMDGPU/spill224.mir
M llvm/test/CodeGen/AMDGPU/spill288.mir
M llvm/test/CodeGen/AMDGPU/spill320.mir
M llvm/test/CodeGen/AMDGPU/spill352.mir
M llvm/test/CodeGen/AMDGPU/spill384.mir
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/unexpected-reg-unit-state.mir
M llvm/test/CodeGen/AMDGPU/unsupported-calls.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
A llvm/test/CodeGen/AMDGPU/xor-r600.ll
M llvm/test/CodeGen/AMDGPU/xor.ll
M llvm/test/CodeGen/ARM/build-attributes.ll
M llvm/test/CodeGen/ARM/cortexr52-misched-basic.ll
M llvm/test/CodeGen/ARM/frame-chain-reserved-fp.ll
M llvm/test/CodeGen/ARM/frame-chain.ll
M llvm/test/CodeGen/ARM/lsr-scale-addr-mode.ll
M llvm/test/CodeGen/ARM/misched-fp-basic.ll
M llvm/test/CodeGen/ARM/misched-int-basic-thumb2.mir
M llvm/test/CodeGen/ARM/misched-int-basic.mir
A llvm/test/CodeGen/ARM/neon_vabd.ll
M llvm/test/CodeGen/ARM/proc-resource-sched.ll
M llvm/test/CodeGen/ARM/regalloc-fast-rewrite-implicits.mir
M llvm/test/CodeGen/ARM/single-issue-r52.mir
M llvm/test/CodeGen/ARM/useaa.ll
M llvm/test/CodeGen/ARM/vaba.ll
M llvm/test/CodeGen/ARM/vabd.ll
A llvm/test/CodeGen/LoongArch/fp16-promote.ll
M llvm/test/CodeGen/LoongArch/global-address.ll
M llvm/test/CodeGen/LoongArch/intrinsic-la64.ll
M llvm/test/CodeGen/LoongArch/intrinsic.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/br.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/load-store.ll
A llvm/test/CodeGen/LoongArch/machinelicm-address-pseudos.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
M llvm/test/CodeGen/LoongArch/psabi-restricted-scheduling.ll
M llvm/test/CodeGen/LoongArch/sextw-removal.ll
M llvm/test/CodeGen/LoongArch/vector-fp-imm.ll
M llvm/test/CodeGen/MIR/Generic/runPass.mir
A llvm/test/CodeGen/NVPTX/intr-range.ll
M llvm/test/CodeGen/NVPTX/intrinsic-old.ll
M llvm/test/CodeGen/PowerPC/2010-05-03-retaddr1.ll
M llvm/test/CodeGen/PowerPC/frameaddr.ll
M llvm/test/CodeGen/PowerPC/spill-nor0.mir
M llvm/test/CodeGen/PowerPC/toc-data-common.ll
M llvm/test/CodeGen/PowerPC/toc-data.ll
A llvm/test/CodeGen/PowerPC/tocdata-firm-alignment.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/merge-unmerge-rv32.mir
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/select-fp.ll
M llvm/test/CodeGen/RISCV/rvv/vmsbf.ll
M llvm/test/CodeGen/RISCV/rvv/vmsif.ll
M llvm/test/CodeGen/RISCV/rvv/vmsof.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-fp.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll
M llvm/test/CodeGen/SPIRV/event-wait-ptr-type.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_subgroup_rotate/subgroup-rotate.ll
M llvm/test/CodeGen/SPIRV/passes/SPIRVEmitIntrinsics-no-divergent-spv_assign_ptr_type.ll
M llvm/test/CodeGen/SPIRV/passes/SPIRVEmitIntrinsics-no-duplicate-spv_assign_type.ll
A llvm/test/CodeGen/SPIRV/transcoding/OpGroupAsyncCopy-strided.ll
M llvm/test/CodeGen/SPIRV/transcoding/builtin_vars_arithmetics.ll
M llvm/test/CodeGen/SPIRV/transcoding/check_ro_qualifier.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_non_uniform_vote.ll
M llvm/test/CodeGen/SystemZ/regalloc-fast-invalid-kill-flag.mir
M llvm/test/CodeGen/Thumb/frame-access.ll
M llvm/test/CodeGen/Thumb/frame-chain-reserved-fp.ll
M llvm/test/CodeGen/Thumb/frame-chain.ll
M llvm/test/CodeGen/Thumb/high-reg-clobber.mir
M llvm/test/CodeGen/Thumb2/high-reg-spill.mir
M llvm/test/CodeGen/Thumb2/mve-tailpred-vptblock.ll
A llvm/test/CodeGen/WebAssembly/expand-variadic-call.ll
M llvm/test/CodeGen/WebAssembly/simd-arith.ll
A llvm/test/CodeGen/WebAssembly/vararg-frame.ll
M llvm/test/CodeGen/X86/avx512fp16-fminimum-fmaximum.ll
M llvm/test/CodeGen/X86/bug47278-eflags-error.mir
M llvm/test/CodeGen/X86/bug47278.mir
M llvm/test/CodeGen/X86/callbr-asm-outputs-regallocfast.mir
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
M llvm/test/CodeGen/X86/fastregalloc-selfloop.mir
M llvm/test/CodeGen/X86/fastregalloc-tied-undef.mir
A llvm/test/CodeGen/X86/llvm.tan.ll
M llvm/test/CodeGen/X86/pr38539.ll
M llvm/test/CodeGen/X86/regalloc-fast-missing-live-out-spill.mir
M llvm/test/CodeGen/X86/statepoint-fastregalloc.mir
M llvm/test/CodeGen/X86/vec-libcalls.ll
M llvm/test/CodeGen/X86/virtreg-physreg-def-regallocfast.mir
A llvm/test/DebugInfo/X86/DW_OP_LLVM_extract_bits.ll
A llvm/test/DebugInfo/X86/sdag-order.ll
M llvm/test/DebugInfo/symbolize-gnu-debuglink-no-realpath.test
M llvm/test/Instrumentation/HWAddressSanitizer/stack-safety-analysis.ll
M llvm/test/MC/AMDGPU/gfx1150_asm_features.s
M llvm/test/MC/ARM/dfb-neg.s
M llvm/test/MC/ARM/dfb.s
A llvm/test/MC/ARM/invalid-armv8r.s
M llvm/test/MC/ARM/thumb-hints.s
M llvm/test/MC/Disassembler/ARM/dfb-thumb.txt
M llvm/test/MC/RISCV/relocations.s
M llvm/test/MC/WebAssembly/reloc-pic64.s
M llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
M llvm/test/Other/can-execute.txt
M llvm/test/Other/lit-unicode.txt
A llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit.ll
A llvm/test/Transforms/ExpandVariadics/expand-va-intrinsic-split-linkage.ll
A llvm/test/Transforms/ExpandVariadics/expand-va-intrinsic-split-simple.ll
A llvm/test/Transforms/ExpandVariadics/indirect-calls.ll
A llvm/test/Transforms/ExpandVariadics/intrinsics.ll
A llvm/test/Transforms/ExpandVariadics/invoke.ll
A llvm/test/Transforms/ExpandVariadics/pass-byval-byref.ll
A llvm/test/Transforms/ExpandVariadics/pass-indirect.ll
A llvm/test/Transforms/ExpandVariadics/pass-integers.ll
M llvm/test/Transforms/InstCombine/abs-1.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sge-to-icmp-sle.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sgt-to-icmp-sgt.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sle-to-icmp-sle.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-slt-to-icmp-sgt.ll
M llvm/test/Transforms/InstCombine/icmp-and-lowbit-mask.ll
M llvm/test/Transforms/InstCombine/icmp-of-and-x.ll
M llvm/test/Transforms/InstCombine/icmp-of-or-x.ll
M llvm/test/Transforms/InstCombine/select.ll
M llvm/test/Transforms/LoopStrengthReduce/AArch64/lsr-reuse.ll
A llvm/test/Transforms/LoopStrengthReduce/RISCV/many-geps.ll
A llvm/test/Transforms/LoopUnroll/convergent.controlled.ll
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-VF2-VF8.ll
M llvm/test/Transforms/LoopVectorize/X86/svml-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/veclib-calls.ll
M llvm/test/Transforms/SimplifyCFG/ARM/switch-to-lookup-table.ll
M llvm/test/Transforms/SimplifyCFG/RISCV/switch_to_lookup_table-rv32.ll
M llvm/test/Transforms/SimplifyCFG/RISCV/switch_to_lookup_table-rv64.ll
M llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table.ll
A llvm/test/tools/llc/new-pm/regalloc-amdgpu.mir
M llvm/test/tools/llvm-cov/gcov/intermediate-format.test
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx2.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-sse3.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-ssse3.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-sse3.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
M llvm/test/tools/llvm-rc/windres-prefix.test
M llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
M llvm/test/tools/llvm-reduce/remove-debug-info-nodes.ll
M llvm/test/tools/split-file/output-is-special.test
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/tools/llvm-reduce/deltas/ReduceDIMetadata.cpp
M llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
M llvm/unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
M llvm/unittests/Support/VirtualFileSystemTest.cpp
M llvm/unittests/TargetParser/Host.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/utils/gn/secondary/bolt/lib/Core/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/LoongArch/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/IPO/BUILD.gn
M llvm/utils/lit/lit/llvm/config.py
M mlir/include/mlir-c/Dialect/LLVM.h
M mlir/include/mlir-c/IR.h
M mlir/include/mlir/Dialect/LLVMIR/FunctionCallUtils.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrs.h
M mlir/include/mlir/Dialect/Tensor/TransformOps/TensorTransformOps.td
M mlir/include/mlir/Dialect/Tensor/Transforms/Transforms.h
M mlir/include/mlir/Target/LLVMIR/Export.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/CAPI/Dialect/LLVM.cpp
M mlir/lib/CAPI/IR/IR.cpp
M mlir/lib/Conversion/MemRefToLLVM/AllocLikeConversion.cpp
M mlir/lib/Dialect/LLVMIR/IR/FunctionCallUtils.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/SCF/TransformOps/SCFTransformOps.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Tensor/TransformOps/TensorTransformOps.cpp
M mlir/lib/Dialect/Tensor/Transforms/PackAndUnpackPatterns.cpp
M mlir/lib/Dialect/Tensor/Transforms/RewriteAsConstant.cpp
M mlir/lib/Dialect/Utils/IndexingUtils.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorInterleave.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/IR/AsmPrinter.cpp
M mlir/lib/Target/LLVMIR/DebugImporter.cpp
M mlir/lib/Target/LLVMIR/DebugImporter.h
M mlir/lib/Target/LLVMIR/DebugTranslation.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.h
M mlir/test/CAPI/llvm.c
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Dialect/SCF/transform-ops.mlir
M mlir/test/Dialect/Tensor/canonicalize.mlir
M mlir/test/Dialect/Tensor/fold-into-pack-and-unpack.mlir
M mlir/test/Dialect/Tensor/rewrite-as-constant.mlir
A mlir/test/Dialect/Vector/vector-deinterleave-lowering-transforms.mlir
M mlir/test/Dialect/Vector/vector-transfer-flatten.mlir
M mlir/test/IR/array-of-attr.mlir
M mlir/test/Target/LLVMIR/Import/debug-info.ll
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
M mlir/test/python/ir/affine_expr.py
M mlir/test/python/ir/attributes.py
M mlir/test/python/ir/blocks.py
M mlir/test/python/ir/builtin_types.py
M offload/DeviceRTL/CMakeLists.txt
M offload/include/PluginManager.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/host/src/rtl.cpp
M offload/src/PluginManager.cpp
M offload/src/omptarget.cpp
M offload/test/offloading/ompx_bare_shfl_down_sync.cpp
M openmp/CMakeLists.txt
M third-party/unittest/googletest/include/gtest/internal/gtest-port.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/__support/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/libc_math_test_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/src/math/smoke/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
Merge branch 'main' into users/kparzysz/spr/b02-directive-category
Compare: https://github.com/llvm/llvm-project/compare/b243f852d7ac...9c56724a2d35
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