[all-commits] [llvm/llvm-project] 0295c2: [PowerPC][AIX] Support ByVals with greater alignme...

[Zarko Todorovski via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0295c2ada4d9964a2b6289c905e320bd42461f99
      https://github.com/llvm/llvm-project/commit/0295c2ada4d9964a2b6289c905e320bd42461f99
  Author: Zarko Todorovski <64787215+ZarkoT at users.noreply.github.com>
  Date:   2024-06-05 (Wed, 05 Jun 2024)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/test/CodeGen/PowerPC/aix-cc-byval-limitation3.ll
    A llvm/test/CodeGen/PowerPC/aix-vector-byval-callee.ll
    A llvm/test/CodeGen/PowerPC/aix-vector-byval.ll

  Log Message:
  -----------
  [PowerPC][AIX] Support ByVals with greater alignment then pointer size (#93341)

Implementation is NOT compatible with IBM XL C 16.1 and earlier but is
compatible with GCC.
It handles all ByVals with greater alignment then pointer width the same
way IBM XL C handles Byvals
that have vector members. For overaligned objects that do not contain
vectors IBM XL C does not align them properly if they are passed in the
GPR
argument registers.

This patch was originally written by Sean Fertile @mandlebug. 

Previously on Phabricator https://reviews.llvm.org/D105659



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