[all-commits] [llvm/llvm-project] 910098: [RISCV] Match strided vector bases in RISCVGatherS...
Luke Lau via All-commits
all-commits at lists.llvm.org
Mon Jun 3 03:12:50 PDT 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 910098e40572f9fe6bfde161eafd1b390a356043
https://github.com/llvm/llvm-project/commit/910098e40572f9fe6bfde161eafd1b390a356043
Author: Luke Lau <luke at igalia.com>
Date: 2024-06-03 (Mon, 03 Jun 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/strided-load-store.ll
Log Message:
-----------
[RISCV] Match strided vector bases in RISCVGatherScatterLowering (#93972)
Currently we only match GEPs with a scalar base pointer, but a common
pattern that's emitted from the loop vectorizer is a strided vector base
plus some sort of scalar offset:
%base = getelementptr i64, ptr %p, <vscale x 1 x i64> %step
%gep = getelementptr i64, <vscale x 1 x ptr> %base, i64 %offset
This is common for accesses into a struct e.g. f[i].b below:
struct F { int a; char b; };
void foo(struct F *f) {
for (int i = 0; i < 1024; i += 2) {
f[i].a++;
f[i].b++;
}
}
This patch handles this case in RISCVGatherScatterLowering by recursing
on the base pointer if it's a vector.
With this we can convert roughly 80% of the indexed loads and stores
emitted to strided loads and stores on SPEC CPU 2017, -O3
-march=rva22u64_v
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