[all-commits] [llvm/llvm-project] 47fd32: [DAGCombine] Fix type mismatch in `(shl X, cttz(Y)...

[Yingwei Zheng via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 47fd32f81c593ae698765e3f3f13998ac9a9abbf
      https://github.com/llvm/llvm-project/commit/47fd32f81c593ae698765e3f3f13998ac9a9abbf
  Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
  Date:   2024-06-01 (Sat, 01 Jun 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    A llvm/test/CodeGen/PowerPC/pr85066.ll

  Log Message:
  -----------
  [DAGCombine] Fix type mismatch in `(shl X, cttz(Y)) -> (mul (Y & -Y),  X)` (#94008)

Proof: https://alive2.llvm.org/ce/z/J7GBMU

Same as https://github.com/llvm/llvm-project/pull/92753, the types of
LHS and RHS in shift nodes may differ.
+ When VT is smaller than ShiftVT, it is safe to use trunc.
+ When VT is larger than ShiftVT, it is safe to use zext iff
`is_zero_poison` is true (i.e., `opcode == ISD::CTTZ_ZERO_UNDEF`). See
also the counterexample `src_shl_cttz2 -> tgt_shl_cttz2` in the alive2
proofs.

Fixes issue
https://github.com/llvm/llvm-project/pull/85066#issuecomment-2142553617.



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