[all-commits] [llvm/llvm-project] 8bce40: [AArch64][GISel] Support SVE with 128-bit min-size...

[Him188 via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8bce40b1eb3eb00358bbc3b7a05ea987a183265f
      https://github.com/llvm/llvm-project/commit/8bce40b1eb3eb00358bbc3b7a05ea987a183265f
  Author: Him188 <tguan at nvidia.com>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
    M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64RegisterBanks.td
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
    A llvm/test/CodeGen/AArch64/GlobalISel/sve-load-store.ll

  Log Message:
  -----------
  [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (#92130)

This patch adds basic support for scalable vector types in load & store
instructions for AArch64 with GISel.

Only scalable vector types with a 128-bit base size are supported, e.g.
`<vscale x 4 x i32>`, `<vscale x 16 x i8>`.

This patch adapted some ideas from a similar abandoned patch
[https://github.com/llvm/llvm-project/pull/72976](https://github.com/llvm/llvm-project/pull/72976).



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