[all-commits] [llvm/llvm-project] ec8fe5: [RISCV] Move vnclipu patterns into DAGCombiner. (#...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ec8fe598a94d2826f8e4f79367a5a45a6b32d284
      https://github.com/llvm/llvm-project/commit/ec8fe598a94d2826f8e4f79367a5a45a6b32d284
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-05-29 (Wed, 29 May 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td

  Log Message:
  -----------
  [RISCV] Move vnclipu patterns into DAGCombiner. (#93596)

I plan to add support for multiple layers of vnclipu. For example,
i32->i8 using 2 vnclipu instructions. First clipping to 65535, then
clipping to 255. Similar for signed vnclip.
    
This scales poorly if we need to add patterns with 2 or 3 truncates.
Instead, move the code to DAGCombiner with new ISD opcodes to represent
VCLIP(U).
    
This patch just moves the existing patterns into DAG combine. Support
for multiple truncates will as a follow up. A similar patch series will
be made for the signed vnclip.



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