[all-commits] [llvm/llvm-project] 6127f1: [PowerPC] option `-msoft-float` should not block t...

[zhijian lin via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6127f15e5b4834411e8f2e700e25c40490deec35
      https://github.com/llvm/llvm-project/commit/6127f15e5b4834411e8f2e700e25c40490deec35
  Author: zhijian lin <zhijian at ca.ibm.com>
  Date:   2024-05-29 (Wed, 29 May 2024)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPC.td
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/lib/Target/PowerPC/PPCInstrP10.td
    M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
    A llvm/test/CodeGen/PowerPC/pr62372.ll

  Log Message:
  -----------
  [PowerPC] option `-msoft-float` should not block the PC-relative address instruction (#92543)

The Prefix instruction is introduced on PowerPC ISA3_1.

In the PR,  
1. The `FeaturePrefixInstrs` do not imply the `FeatureP8Vector`
,`FeatureP9Vector` .
2. `FeaturePrefixInstrs`  implies only the FeatureISA3_1.
3. For the prefix instructions `paddi` and `pli` , they have `Predicates
= [PrefixInstrs] `
4. For the prefix instructions `plfs` and `plfd`, they have `Predicates
= [PrefixInstrs, HasFPU] `
5. For the prefix instructions "plxv` , "plxssp` and `plxsd` , they have
`Predicates = [PrefixInstrs, HasP10Vector]`

Fixes #62372



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