[all-commits] [llvm/llvm-project] 14dc97: [AArch64][GlobalISel] Push ADD/SUB through Extend ...

chuongg3 via All-commits all-commits at lists.llvm.org
Wed May 29 07:16:16 PDT 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 14dc97df5ef3a9178fc4175303f0f86ed4e3f98e
      https://github.com/llvm/llvm-project/commit/14dc97df5ef3a9178fc4175303f0f86ed4e3f98e
  Author: chuongg3 <chuong.goh at arm.com>
  Date:   2024-05-29 (Wed, 29 May 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64Combine.td
    M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/combine-add.mir
    M llvm/test/CodeGen/AArch64/aarch64-addv.ll
    M llvm/test/CodeGen/AArch64/arm64-vabs.ll
    M llvm/test/CodeGen/AArch64/neon-extadd.ll
    M llvm/test/CodeGen/AArch64/vecreduce-add.ll

  Log Message:
  -----------
  [AArch64][GlobalISel] Push ADD/SUB through Extend Instructions (#90964)

The regression in one test is due to a SUB instruction being pushed
through the extend, leaving behind the abs instruction, which prevents
it from selecting uabdl instructions shown below:

`i32 abs(i32 sub(i32 ext i8, i32 ext i8))` => 
`i32 abs(i32 ext(i16 sub(i16 ext i8, i16 ext i8)))`

This is intended to be fixed in a follow up patch



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