[all-commits] [llvm/llvm-project] f6ace2: [AArch64] Expand vector ops when NEON and SVE are ...

[Sander de Smalen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f6ace2bc15bfde4cc9bd140859fa92618568a006
      https://github.com/llvm/llvm-project/commit/f6ace2bc15bfde4cc9bd140859fa92618568a006
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2024-05-29 (Wed, 29 May 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-and-combine.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-bit-counting.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-bitcast.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-bitselect.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-concat.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-ext-loads.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-extract-subvector.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-extract-vector-elt.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fcopysign.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-arith.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-compares.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-convert.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-extend-trunc.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-fma.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-minmax.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-reduce-fa64.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-reduce.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-rounding.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-select.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-to-int.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-vselect.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-insert-vector-elt.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-arith.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-compares.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-div.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-extends.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-immediates.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-log.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-minmax.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-mla-neon-fa64.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-mulh.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-reduce.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-rem.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-select.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-shifts.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-to-fp.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-vselect.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-ld2-alloca.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-limit-duplane.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-loads.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-log-reduce.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-load.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-store.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-optimize-ptrue.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-permute-rev.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-permute-zip-uzp-trn.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-ptest.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-rev.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-sdiv-pow2.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-shuffle.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-splat-vector.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-stores.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-subvector.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-trunc-stores.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-trunc.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-vector-shuffle.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-test-register-mov.ll

  Log Message:
  -----------
  [AArch64] Expand vector ops when NEON and SVE are unavailable. (#90833)

Unlike `+noneon` we must assume that vector types are available, i.e.
it is valid to pass/return vector arguments to and from functions.
However, the compiler must make sure to scalarize any vector
operations.



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