[all-commits] [llvm/llvm-project] 9e0be6: [AMDGPU] Fix broken MIR generated by gfx11 simulat...

[Emma Pilkington via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9e0be65f24bca1bd95c25d3191c75461a080af49
      https://github.com/llvm/llvm-project/commit/9e0be65f24bca1bd95c25d3191c75461a080af49
  Author: Emma Pilkington <emma.pilkington95 at gmail.com>
  Date:   2024-05-22 (Wed, 22 May 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-trap-gfx11.mir
    M llvm/test/CodeGen/AMDGPU/trap-abis.ll

  Log Message:
  -----------
  [AMDGPU] Fix broken MIR generated by gfx11 simulated trap lowering (#91652)

This was breaking the CFG connection between uses of virtual registers
after the trap and their definitions before it. Fixes SWDEV-460384.

Fixes a bug in #85854.



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