[all-commits] [llvm/llvm-project] 7064e4: [RISCV] Split and rename WriteVISlideX into WriteV...

[Min-Yih Hsu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7064e4b1633811da984261fdc585ba4438efe827
      https://github.com/llvm/llvm-project/commit/7064e4b1633811da984261fdc585ba4438efe827
  Author: Min-Yih Hsu <min.hsu at sifive.com>
  Date:   2024-05-20 (Mon, 20 May 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
    M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
    M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
    M llvm/lib/Target/RISCV/RISCVScheduleV.td

  Log Message:
  -----------
  [RISCV] Split and rename WriteVISlideX into WriteVSlideUpX and WriteVSlideDownX (#92605)

Some processors might have different latencies and/or rthroughput for
slide up and down operations on integer vectors, yet there is only a
single SchedWrite for both of them at this moment. This patch splits
this SchedWrite into two as well as drop the "I" before "Slide" since
such information is redundant. We also do the same renaming on
`WriteVISlideI`.
Note that we only split the X variant (i.e. using a register value for
index offset) for now.

This is effectively NFC.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications