[all-commits] [llvm/llvm-project] ce1a0d: [AArch64] Optimize `MOV` to `ORR` when load symmet...

[hanbeom via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ce1a0d8ad380d12dc7ea001cfab3749bb23d445d
      https://github.com/llvm/llvm-project/commit/ce1a0d8ad380d12dc7ea001cfab3749bb23d445d
  Author: hanbeom <kese111 at gmail.com>
  Date:   2024-05-20 (Mon, 20 May 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ExpandImm.cpp
    M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
    M llvm/test/CodeGen/AArch64/movimm-expand-ldst.ll
    M llvm/test/CodeGen/AArch64/movimm-expand-ldst.mir

  Log Message:
  -----------
  [AArch64] Optimize `MOV` to `ORR` when load symmetric constants (#86249)

This change looks for cases of symmetric constant loading.
`symmetric constant load` is when the upper 32 bits and lower 32 bits
of a 64-bit register load the same value.

When it finds this, it replaces it with an instruction that loads only
the lower 32 bits of the constant and stores it in the upper and lower
bits simultaneously.

For example:
  renamable $x8 = MOVZXi 49370, 0
  renamable $x8 = MOVKXi $x8, 320, 16
  renamable $x8 = MOVKXi $x8, 49370, 32
  renamable $x8 = MOVKXi $x8, 320, 48
becomes
  renamable $x8 = MOVZXi 49370, 0
  renamable $x8 = MOVKXi $x8, 320, 16
  renamable $x8 = ORRXrs $x8, $x8, 32



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