[all-commits] [llvm/llvm-project] be2396: [RISCV] Add canonical ISA string as Module metadat...

[Craig Topper via All-commits]

  Branch: refs/heads/release/18.x
  Home:   https://github.com/llvm/llvm-project
  Commit: be239653149f45e4a23036c840ae0bcdc9818161
      https://github.com/llvm/llvm-project/commit/be239653149f45e4a23036c840ae0bcdc9818161
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-05-14 (Tue, 14 May 2024)

  Changed paths:
    M clang/lib/CodeGen/CodeGenModule.cpp
    M clang/test/CodeGen/RISCV/ntlh-intrinsics/riscv32-zihintntl.c
    A clang/test/CodeGen/RISCV/riscv-metadata-arch.c

  Log Message:
  -----------
  [RISCV] Add canonical ISA string as Module metadata in IR. (#80760)

In an LTO build, we don't set the ELF attributes to indicate what
extensions were compiled with. The target CPU/Attrs in
RISCVTargetMachine do not get set for an LTO build. Each function gets a
target-cpu/feature attribute, but this isn't usable to set ELF attributs
since we wouldn't know what function to use. We can't just once since it
might have been compiler with an attribute likes target_verson.

This patch adds the ISA as Module metadata so we can retrieve it in the
backend. Individual translation units can still be compiled with
different strings so we need to collect the unique set when Modules are
merged.

The backend will need to combine the unique ISA strings to produce a
single value for the ELF attributes. This will be done in a separate
patch.


  Commit: 3512b12a79818b8089fcfa223586981a15ffb6b4
      https://github.com/llvm/llvm-project/commit/3512b12a79818b8089fcfa223586981a15ffb6b4
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-05-14 (Tue, 14 May 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h

  Log Message:
  -----------
  [RISCV] Store RVC and TSO ELF flags explicitly in RISCVTargetStreamer. NFCI (#83344)

Instead of caching STI in the RISCVELFTargetStreamer, store the two
flags we need from it.

My goal is to allow RISCVAsmPrinter to override these flags using IR
module metadata for LTO. So they need to be separated from the STI used
to construct the TargetStreamer.

This patch should be NFC as long as no one is changing the contents of
the STI that was used to construct the TargetStreamer between the
constructor and the use of the flags.


  Commit: dff7178183567f1f2a9ad1e2eb99da9fae019e15
      https://github.com/llvm/llvm-project/commit/dff7178183567f1f2a9ad1e2eb99da9fae019e15
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-05-14 (Tue, 14 May 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
    A llvm/test/CodeGen/RISCV/attributes-module-flag.ll
    A llvm/test/CodeGen/RISCV/module-elf-flags.ll

  Log Message:
  -----------
  [RISCV] Use 'riscv-isa' module flag to set ELF flags and attributes. (#85155)

Walk all the ISA strings and set the subtarget bits for any extension we
find in any string.

This allows LTO output to have a ELF attributes from the union of all of
the files used to compile it.


Compare: https://github.com/llvm/llvm-project/compare/6cfa40e450cf...dff717818356

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