[all-commits] [llvm/llvm-project] 55e590: [RISCV] Exclude vector callee saved registers from...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 55e59083cb610f30ad21fe8c8cdb9900534937ec
      https://github.com/llvm/llvm-project/commit/55e59083cb610f30ad21fe8c8cdb9900534937ec
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-05-13 (Mon, 13 May 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
    M llvm/test/CodeGen/RISCV/rvv/callee-saved-regs.ll

  Log Message:
  -----------
  [RISCV] Exclude vector callee saved registers from RISCVRegisterInfo::needsFrameBaseReg

The vector callee saved registers shouldn't affect the frame pointer
offset so we don't want to consider them.

I've listed the GPR, FPR32, and FPR64 register classes explicitly
because getMinimalPhysRegClass is slow and this function is called
frequently. So explicitly listing the interesting classs should be
a compile time improvement.



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