[all-commits] [llvm/llvm-project] 69e131: [AArch64][GlobalISel] Select G_ICMP instruction th...

[chuongg3 via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 69e13125af2511abd59499272c88fcb6f19b9300
      https://github.com/llvm/llvm-project/commit/69e13125af2511abd59499272c88fcb6f19b9300
  Author: chuongg3 <chuong.goh at arm.com>
  Date:   2024-05-13 (Mon, 13 May 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h
    M llvm/test/CodeGen/AArch64/GlobalISel/select-cmp.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-vector-icmp.mir

  Log Message:
  -----------
  [AArch64][GlobalISel] Select G_ICMP instruction through TableGen (#89932)

G_ICMP NE => XOR(G_ICMP EQ, -1) moved to Legalizer to allow for combines
if they come up in following passes.



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