[all-commits] [llvm/llvm-project] 23b673: [DAG][AArch64] Handle vscale addressing modes in r...

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 23b673e5b4b73b42864fcd7d63c1e974317ed4d6
      https://github.com/llvm/llvm-project/commit/23b673e5b4b73b42864fcd7d63c1e974317ed4d6
  Author: David Green <david.green at arm.com>
  Date:   2024-05-10 (Fri, 10 May 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/AArch64/sve-reassocadd.ll

  Log Message:
  -----------
  [DAG][AArch64] Handle vscale addressing modes in reassociationCanBreakAddressingModePattern (#89908)

reassociationCanBreakAddressingModePattern tries to prevent bad add
reassociations that would break adrressing mode patterns. This adds
support for vscale offset addressing modes, making sure we don't break
patterns that already exist. It does not optimize _to_ the correct
addressing modes yet, but prevents us from optimizating _away_ from
them.



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