[all-commits] [llvm/llvm-project] 084e2b: [MLIR][Interfaces] Change MemorySlotInterface to u...

[Christian Ulmann via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 084e2b53d22c11e013b0a495b65d39aa7f934048
      https://github.com/llvm/llvm-project/commit/084e2b53d22c11e013b0a495b65d39aa7f934048
  Author: Christian Ulmann <christianulmann at gmail.com>
  Date:   2024-05-08 (Wed, 08 May 2024)

  Changed paths:
    M mlir/include/mlir/Interfaces/MemorySlotInterfaces.td
    M mlir/include/mlir/Transforms/Mem2Reg.h
    M mlir/include/mlir/Transforms/SROA.h
    M mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
    M mlir/lib/Dialect/MemRef/IR/MemRefMemorySlot.cpp
    M mlir/lib/Transforms/Mem2Reg.cpp
    M mlir/lib/Transforms/SROA.cpp

  Log Message:
  -----------
  [MLIR][Interfaces] Change MemorySlotInterface to use OpBuilder (#91341)

This commit changes the `MemorySlotInterface` back to using `OpBuilder`
instead of a rewriter. This was originally introduced in
https://reviews.llvm.org/D150432 but it was shown that patterns are a
bad idea for both Mem2Reg and SROA.
Mem2Reg suffers from the usage of a rewriter due to being forced to
create new basic blocks. This is an issue, as it leads to the
invalidation of the dominance information, which can be expensive to
recompute.



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