[all-commits] [llvm/llvm-project] 76508d: [AMDGPU] Fix mode register pass for constrained FP...

[Abhinav Garg via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 76508dce4380e0cea2ecb396200a161f7dbefd0b
      https://github.com/llvm/llvm-project/commit/76508dce4380e0cea2ecb396200a161f7dbefd0b
  Author: Abhinav Garg <39309352+abhigargrepo at users.noreply.github.com>
  Date:   2024-05-03 (Fri, 03 May 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIModeRegister.cpp
    M llvm/test/CodeGen/AMDGPU/mode-register-fpconstrain.ll

  Log Message:
  -----------
  [AMDGPU] Fix mode register pass for constrained FP operations (#90085)

This PR will fix the si-mode-register pass which is inserting an extra
setreg instruction in case of constrained FP operations. This pass will
be ignored for strictfp functions.



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