[all-commits] [llvm/llvm-project] 3563af: [DAGCombiner] In mergeTruncStore, make sure we are...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3563af6c06ebc92bcaacef0e33285148ef0f75bd
      https://github.com/llvm/llvm-project/commit/3563af6c06ebc92bcaacef0e33285148ef0f75bd
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-05-03 (Fri, 03 May 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/AArch64/pr90936.ll

  Log Message:
  -----------
  [DAGCombiner] In mergeTruncStore, make sure we aren't storing shifted in bits. (#90939)

When looking through a right shift, we need to make sure that all of
the bits we are using from the shift come from the shift input and
not the sign or zero bits that are shifted in.
    
Fixes #90936.



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