[all-commits] [llvm/llvm-project] 3f1fef: [RISCV] Support interleaved accesses for scalable ...

[Mel Chen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3f1fef369935f833443f18bc2eababfb5e3da0ff
      https://github.com/llvm/llvm-project/commit/3f1fef369935f833443f18bc2eababfb5e3da0ff
  Author: Mel Chen <mel.chen at sifive.com>
  Date:   2024-05-03 (Fri, 03 May 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll

  Log Message:
  -----------
  [RISCV] Support interleaved accesses for scalable vector. (#90583)

The support for interleaved accesses for scalable vector with a factor
of 2 is enabled in vectorizer. Therefore, the patch removed the
restriction for scalable vector with a factor of 2.



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