[all-commits] [llvm/llvm-project] cd4287: [AMDGPU] Convert PrologEpilogSGPRSpills from Dense...

[Jay Foad via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: cd4287bc44fc614a336b5b283a484c402c44ca93
      https://github.com/llvm/llvm-project/commit/cd4287bc44fc614a336b5b283a484c402c44ca93
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2024-05-03 (Fri, 03 May 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
    M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
    M llvm/test/CodeGen/AMDGPU/stack-realign.ll
    M llvm/test/CodeGen/AMDGPU/whole-wave-register-copy.ll
    M llvm/test/CodeGen/AMDGPU/whole-wave-register-spill.ll

  Log Message:
  -----------
  [AMDGPU] Convert PrologEpilogSGPRSpills from DenseMap to sorted vector (#90957)

In practice PrologEpilogSGPRSpills never has more than 3 entries so
DenseMap is overkill. In addition this means that iteration happens in
register number order, instead of DenseMap's hashed order, so it will
not be affected by future patches that define new physical registers.
This should reduce future test case churn.



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