[all-commits] [llvm/llvm-project] fd3e7e: [X86] Adding lowerings for vector ISD::LRINT and I...

[Phoebe Wang via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fd3e7e3a1e661482f46cd0347d0fa62adef30177
      https://github.com/llvm/llvm-project/commit/fd3e7e3a1e661482f46cd0347d0fa62adef30177
  Author: Phoebe Wang <phoebe.wang at intel.com>
  Date:   2024-05-03 (Fri, 03 May 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86InstrAVX512.td
    M llvm/lib/Target/X86/X86InstrSSE.td
    M llvm/test/CodeGen/X86/vector-llrint.ll
    M llvm/test/CodeGen/X86/vector-lrint.ll

  Log Message:
  -----------
  [X86] Adding lowerings for vector ISD::LRINT and ISD::LLRINT (#90065)

- [V]CVTP[D,S]2DQ supports `f64/f32` -> `i32` conversions that can be
mapped to `llvm.lrint.vNi32.vNf64/32` since SSE2. AVX and AVX512 added
256-bit and 512-bit support;
- VCVTP[D,S]2QQ supports `f64/f32` -> `i64` conversions that can be
mapped to `llvm.l[l]rint.vNi64.vNf64/32` since AVX512DQ. All 128-bit,
256-bit (require AVX512VL) and 512-bit are supported.



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