[all-commits] [llvm/llvm-project] f86d26: [RISCV] Add subtarget features for profiles

[Pengcheng Wang via All-commits]

  Branch: refs/heads/users/wangpc-pp/spr/riscv-generate-profiles-from-riscvprofilestd
  Home:   https://github.com/llvm/llvm-project
  Commit: f86d264dfdd6d1fa2fc6f933c9ae7b5db50a770b
      https://github.com/llvm/llvm-project/commit/f86d264dfdd6d1fa2fc6f933c9ae7b5db50a770b
  Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
  Date:   2024-04-28 (Sun, 28 Apr 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCV.td
    A llvm/lib/Target/RISCV/RISCVProfiles.td
    M llvm/test/CodeGen/RISCV/attributes.ll

  Log Message:
  -----------
  [RISCV] Add subtarget features for profiles

This may simplify the usage of tools like `opt`, `llc`, etc.

Reviewers: michaelmaitland, 4vtomat, preames, asb

Reviewed By: michaelmaitland, preames, 4vtomat

Pull Request: https://github.com/llvm/llvm-project/pull/84877


  Commit: 48740b42ea2f82cbb76a3818cc3309bba4d15bb3
      https://github.com/llvm/llvm-project/commit/48740b42ea2f82cbb76a3818cc3309bba4d15bb3
  Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
  Date:   2024-04-28 (Sun, 28 Apr 2024)

  Changed paths:

  Log Message:
  -----------
  [𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]


  Commit: 24799802ed48b176b8e7291a36fce462c5a59f2d
      https://github.com/llvm/llvm-project/commit/24799802ed48b176b8e7291a36fce462c5a59f2d
  Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
  Date:   2024-04-28 (Sun, 28 Apr 2024)

  Changed paths:

  Log Message:
  -----------
  Rebase

Created using spr 1.3.6-beta.1


Compare: https://github.com/llvm/llvm-project/compare/0736f3a5b828...24799802ed48

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