[all-commits] [llvm/llvm-project] c4c9d4: [M68k] Add support for MOVEQ instruction (#88542)

[Peter Lafreniere via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c4c9d4f306732c854fa88d2f30c1a22bb025d0c9
      https://github.com/llvm/llvm-project/commit/c4c9d4f306732c854fa88d2f30c1a22bb025d0c9
  Author: Peter Lafreniere <peter at n8pjl.ca>
  Date:   2024-04-26 (Fri, 26 Apr 2024)

  Changed paths:
    M llvm/lib/Target/M68k/M68kExpandPseudo.cpp
    M llvm/lib/Target/M68k/M68kInstrData.td
    M llvm/lib/Target/M68k/M68kInstrInfo.cpp
    M llvm/lib/Target/M68k/M68kInstrInfo.h
    M llvm/test/CodeGen/M68k/Arith/add-with-overflow.ll
    M llvm/test/CodeGen/M68k/Arith/add.ll
    M llvm/test/CodeGen/M68k/Arith/bitwise.ll
    M llvm/test/CodeGen/M68k/Arith/divide-by-constant.ll
    M llvm/test/CodeGen/M68k/Arith/imul.ll
    M llvm/test/CodeGen/M68k/Arith/smul-with-overflow.ll
    M llvm/test/CodeGen/M68k/Arith/sub-with-overflow.ll
    M llvm/test/CodeGen/M68k/Arith/sub.ll
    M llvm/test/CodeGen/M68k/Arith/umul-with-overflow.ll
    M llvm/test/CodeGen/M68k/CConv/c-call.ll
    M llvm/test/CodeGen/M68k/CConv/fastcc-call.ll
    M llvm/test/CodeGen/M68k/CodeModel/medium-pie-global-access.ll
    M llvm/test/CodeGen/M68k/CodeModel/small-pie-global-access.ll
    M llvm/test/CodeGen/M68k/Control/cmp.ll
    M llvm/test/CodeGen/M68k/Control/long-setcc.ll
    M llvm/test/CodeGen/M68k/Control/setcc.ll
    M llvm/test/CodeGen/M68k/PR57660.ll
    M llvm/test/CodeGen/M68k/gcc_except_table.ll
    M llvm/test/CodeGen/M68k/link-unlnk.ll
    M llvm/test/MC/Disassembler/M68k/data.txt
    M llvm/test/MC/M68k/Data/Classes/MxMove_RI.s

  Log Message:
  -----------
  [M68k] Add support for MOVEQ instruction (#88542)

Add support for the moveq instruction, which is both faster and smaller
(1/2 to 1/3 the size) than a move with immediate to register.

This change introduces the instruction, along with a set of
pseudoinstructions to handle immediate moves to a register that is
lowered post-RA.

Pseudos are used as moveq can only write to the full register, which
makes
matching i8 and i16 immediate loads difficult in tablegen. Furthermore,
selecting moveq before RA constrains that immediate to be moved into a
data
register, which may not be optimal.

The bulk of this change are fixes to existing tests, which cover the new
functionality sufficiently.



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