[all-commits] [llvm/llvm-project] 80628e: [RISCV] Generate RISCVISAInfo table from RISCVFeat...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 80628ee0d555d58a7af797e3fc971a1db4582075
      https://github.com/llvm/llvm-project/commit/80628ee0d555d58a7af797e3fc971a1db4582075
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-04-25 (Thu, 25 Apr 2024)

  Changed paths:
    M llvm/lib/TargetParser/RISCVISAInfo.cpp
    M llvm/test/TableGen/riscv-target-def.td
    M llvm/utils/TableGen/RISCVTargetDefEmitter.cpp

  Log Message:
  -----------
  [RISCV] Generate RISCVISAInfo table from RISCVFeatures.td. (#89955)

This generates the SupportedExtensions and ImpliedExts information from
the RISCVExtension records found in RISCVFeatures.td.

Some of the extensions listed in the individual `ImpliedExts*` arrays
may be in a different, but the order in those array doesn't matter. I
manually verified the all the extensions were still present in each
array.

I've added the new information to the existing RISCVTargetParserDef.inc
and RISCVTargetDefEmitter.cpp so we don't need to re-parse the entirety
of RISCV.td a second time for a new file.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications