[all-commits] [llvm/llvm-project] 76cbd4: [X86] Pre-commit tests (NFC)
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Wed Apr 24 15:12:31 PDT 2024
Branch: refs/heads/release/18.x
Home: https://github.com/llvm/llvm-project
Commit: 76cbd417af50b444f5fbaa628b5a76064e6f10db
https://github.com/llvm/llvm-project/commit/76cbd417af50b444f5fbaa628b5a76064e6f10db
Author: Rose <gfunni234 at gmail.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M llvm/test/CodeGen/X86/sar_fold.ll
Log Message:
-----------
[X86] Pre-commit tests (NFC)
Commit: 111ae4509c96878058cb02e7841c7afcad14875b
https://github.com/llvm/llvm-project/commit/111ae4509c96878058cb02e7841c7afcad14875b
Author: Rose <gfunni234 at gmail.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/sar_fold.ll
Log Message:
-----------
[X86] Fix miscompile in combineShiftRightArithmetic
When folding (ashr (shl, x, c1), c2) we need to treat c1 and c2
as unsigned to find out if the combined shift should be a left
or right shift.
Also do an early out during pre-legalization in case c1 and c2
has different types, as that otherwise complicated the comparison
of c1 and c2 a bit.
(cherry picked from commit 3e6e54eb795ce7a1ccd47df8c22fc08125a88886)
Compare: https://github.com/llvm/llvm-project/compare/e7c816b3cd3e...111ae4509c96
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