[all-commits] [llvm/llvm-project] 806db4: [IR] Remove unused variable in Verifier.cpp (NFC)
Vitaly Buka via All-commits
all-commits at lists.llvm.org
Wed Apr 24 13:04:59 PDT 2024
Branch: refs/heads/users/vitalybuka/spr/libcxx-avoid-__cxa_atexit-with-o0
Home: https://github.com/llvm/llvm-project
Commit: 806db47b060b6e70cc71ee5ce8052829f85e6469
https://github.com/llvm/llvm-project/commit/806db47b060b6e70cc71ee5ce8052829f85e6469
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M llvm/lib/IR/Verifier.cpp
Log Message:
-----------
[IR] Remove unused variable in Verifier.cpp (NFC)
llvm-project/llvm/lib/IR/Verifier.cpp:4854:14:
error: unused variable 'IsLeaf' [-Werror,-Wunused-variable]
const auto IsLeaf = [](const Metadata *CurMD) {
^
1 error generated.
Commit: ad4a42bbc7f8d27d8e91b69dbd3282cf873d418e
https://github.com/llvm/llvm-project/commit/ad4a42bbc7f8d27d8e91b69dbd3282cf873d418e
Author: Luke Lau <luke at igalia.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
Log Message:
-----------
[RISCV] Remove -riscv-split-regalloc flag (#89715)
Split vector and scalar regalloc has been enabled by default for 5
months now since d0a39e617ba301a76d28e2d82e1f657999c9dcfb, and shipped
with 18.1.0. I haven't heard of any issues with it so far, so this
proposes to remove the flag to reduce the number of configurations we
have to support.
Commit: 7da63426ac5d9719038842c30ca2a644620be071
https://github.com/llvm/llvm-project/commit/7da63426ac5d9719038842c30ca2a644620be071
Author: Lang Hames <lhames at gmail.com>
Date: 2024-04-23 (Tue, 23 Apr 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
M llvm/include/llvm/ExecutionEngine/Orc/TaskDispatch.h
M llvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/TaskDispatch.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp
M llvm/unittests/ExecutionEngine/Orc/OrcTestCommon.cpp
M llvm/unittests/ExecutionEngine/Orc/OrcTestCommon.h
M llvm/unittests/ExecutionEngine/Orc/TaskDispatchTest.cpp
Log Message:
-----------
Re-apply "[ORC] Unify task dispatch across ExecutionSession..." with more fixes.
This re-applies 6094b3b7db7, which was reverted in e7efd37c229 (and before that
in 1effa19de24) due to bot failures.
The test failures were fixed by having SelfExecutorProcessControl use an
InPlaceTaskDispatcher by default, rather than a DynamicThreadPoolTaskDispatcher.
This shouldn't be necessary (and indicates a concurrency issue elsewhere), but
InPlaceTaskDispatcher is a less surprising default, and better matches the
existing behavior (compilation on current thread by default), so the change
seems reasonable. I've filed https://github.com/llvm/llvm-project/issues/89870
to investigate the concurrency issue as a follow-up.
Coding my way home: 6.25133S 127.94177W
Commit: 9375962ac9e8d8e83fa8e32c3b04bb6970e4b242
https://github.com/llvm/llvm-project/commit/9375962ac9e8d8e83fa8e32c3b04bb6970e4b242
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
M llvm/test/TableGen/ContextlessPredicates.td
M llvm/test/TableGen/DefaultOpsGlobalISel.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/builtins/match-table-eraseroot.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/builtins/match-table-replacerreg.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-imms.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-intrinsics.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-miflags.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-operand-types.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-patfrag-root.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-permutations.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-temp-defs.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-typeof.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table.td
M llvm/test/TableGen/GlobalISelEmitter-atomic_store.td
M llvm/test/TableGen/GlobalISelEmitter-immAllZeroOne.td
M llvm/test/TableGen/GlobalISelEmitter-immarg-literal-pattern.td
M llvm/test/TableGen/GlobalISelEmitter-input-discard.td
M llvm/test/TableGen/GlobalISelEmitter-multiple-output-discard.td
M llvm/test/TableGen/GlobalISelEmitter-multiple-output.td
M llvm/test/TableGen/GlobalISelEmitter-nested-subregs.td
M llvm/test/TableGen/GlobalISelEmitter-notype-output-pattern.td
M llvm/test/TableGen/GlobalISelEmitter-output-discard.td
M llvm/test/TableGen/GlobalISelEmitter-zero-reg.td
M llvm/test/TableGen/GlobalISelEmitter.td
M llvm/test/TableGen/GlobalISelEmitterCustomPredicate.td
M llvm/test/TableGen/GlobalISelEmitterFlags.td
M llvm/test/TableGen/GlobalISelEmitterHwModes.td
M llvm/test/TableGen/GlobalISelEmitterMatchTableOptimizer.td
M llvm/test/TableGen/GlobalISelEmitterMatchTableOptimizerSameOperand-invalid.td
M llvm/test/TableGen/GlobalISelEmitterMatchTableOptimizerSameOperand.td
M llvm/test/TableGen/GlobalISelEmitterOverloadedPtr.td
M llvm/test/TableGen/GlobalISelEmitterRegSequence.td
M llvm/test/TableGen/GlobalISelEmitterSubreg.td
M llvm/test/TableGen/GlobalISelEmitterVariadic.td
M llvm/test/TableGen/HasNoUse.td
M llvm/test/TableGen/address-space-patfrags.td
M llvm/test/TableGen/gisel-physreg-input.td
M llvm/test/TableGen/immarg-predicated.td
M llvm/test/TableGen/immarg.td
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
Log Message:
-----------
[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
The vast majority of the following (very common) opcodes were always
called with identical arguments:
- `GIM_CheckType` for the root
- `GIM_CheckRegBankForClass` for the root
- `GIR_Copy` between the old and new root
- `GIR_ConstrainSelectedInstOperands` on the new root
- `GIR_BuildMI` to create the new root
I added overloaded version of each opcode specialized for the root
instructions. It always saves between 1 and 2 bytes per instance
depending on the number of arguments specialized into the opcode. Some
of these opcodes had between 5 and 15k occurences in the AArch64
GlobalISel Match Table.
Additionally, the following opcodes are almost always used in the same
sequence:
- `GIR_EraseFromParent 0` + `GIR_Done`
- `GIR_EraseRootFromParent_Done` has been created to do both. Saves 2
bytes per occurence.
- `GIR_IsSafeToFold` was *always* called for each InsnID except 0.
- Changed the opcode to take the number of instructions to check after
`MI[0]`
The savings from these are pretty neat. For `AArch64GenGlobalISel.inc`:
- `AArch64InstructionSelector.cpp.o` goes down from 772kb to 704kb (-10%
code size)
- Self-reported MatchTable size goes from 420380 bytes to 352426 bytes
(~ -17%)
A smaller match table means a faster match table because we spend less
time iterating and decoding.
I don't have a solid measurement methodology for GlobalISel performance
so I don't have precise numbers but I saw a few % of improvements in a
simple testcase.
Commit: 008b7f1dfdba5cd0479cbb0348d84d0eeb8b5d46
https://github.com/llvm/llvm-project/commit/008b7f1dfdba5cd0479cbb0348d84d0eeb8b5d46
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/HostAssociations.cpp
M flang/test/Lower/HLFIR/internal-procedures.f90
Log Message:
-----------
[flang] implement capture of procedure pointers in internal procedures (#89619)
Commit: 46b011d0ccb468613bcc7e9e756518f9f383001d
https://github.com/llvm/llvm-project/commit/46b011d0ccb468613bcc7e9e756518f9f383001d
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/IR/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/IR/BUILD.gn
Log Message:
-----------
[gn build] Port cf328ff96daf
Commit: 9a8235a290b87a311217b9ffd811de06bff38746
https://github.com/llvm/llvm-project/commit/9a8235a290b87a311217b9ffd811de06bff38746
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
Log Message:
-----------
[ORC] Fix -Wunused-variable in LLJIT.cpp (NFC)
llvm-project/llvm/lib/ExecutionEngine/Orc/LLJIT.cpp:684:8:
error: unused variable 'ConcurrentCompilationSettingDefaulted' [-Werror,-Wunused-variable]
bool ConcurrentCompilationSettingDefaulted = !SupportConcurrentCompilation;
^
1 error generated.
Commit: 78ebaa2d798f939e35e44778572eb54c4bf36550
https://github.com/llvm/llvm-project/commit/78ebaa2d798f939e35e44778572eb54c4bf36550
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
Log Message:
-----------
[ORC] Fix build failure (NFC)
Commit: b3ca9c30dedf28ecf687779294c1343a840bfd35
https://github.com/llvm/llvm-project/commit/b3ca9c30dedf28ecf687779294c1343a840bfd35
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M llvm/test/Analysis/ValueTracking/known-non-zero.ll
Log Message:
-----------
[ValueTracking] Add tests for isKnowNonZero of `trunc nuw/nsw`; NFC
Commit: b933c8447b2a8797a882d3506460f49fb6f7bf34
https://github.com/llvm/llvm-project/commit/b933c8447b2a8797a882d3506460f49fb6f7bf34
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Analysis/ValueTracking/known-non-zero.ll
Log Message:
-----------
[ValueTracking] Add support for `trunc nuw/nsw` in isKnowNonZero
With `nsw`/`nuw`, the `trunc` is non-zero if its operand is non-zero.
Proofs: https://alive2.llvm.org/ce/z/iujmk6
Closes #89643
Commit: 62db43497fb019d0ac0677ae0c9ea2eba136b230
https://github.com/llvm/llvm-project/commit/62db43497fb019d0ac0677ae0c9ea2eba136b230
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M lldb/docs/conf.py
Log Message:
-----------
[lldb] Enable support for Markdown documentation pages (#89716)
RST is powerful but usually too powerful for 90% of what we need it for.
Markdown is easier to edit and can be previewed easily without building
the entire website.
This copies what llvm does already, making myst_parser optional if you
only want man pages.
Previously we had Markdown enabled in
8b95bd3310c126e76e0714bea6003a9b1aa739fb but that got reverted. That did
this in a different way but I've gone with the standard llvm set this
time.
I intend the first Markdown pages to be the remote protocol extension
docs, as they are not in any set format right now.
Commit: 662ef8604268b207910225ecca90daf30a46720b
https://github.com/llvm/llvm-project/commit/662ef8604268b207910225ecca90daf30a46720b
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M clang/lib/Serialization/ASTWriter.cpp
Log Message:
-----------
[clang][NFC] Remove useless code in ASTWriter
A follow-up to #71709, addressing the static analysis finding reported in https://github.com/llvm/llvm-project/pull/71709/files#r1576846306
Commit: 71c5964f5c0686be3319bc55a0dbfb0e3a60a917
https://github.com/llvm/llvm-project/commit/71c5964f5c0686be3319bc55a0dbfb0e3a60a917
Author: Tomas Matheson <Tomas.Matheson at arm.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M llvm/include/llvm/TargetParser/CMakeLists.txt
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/ARMSubtarget.h
M llvm/lib/TargetParser/CMakeLists.txt
A llvm/utils/TableGen/ARMTargetDefEmitter.cpp
M llvm/utils/TableGen/CMakeLists.txt
Log Message:
-----------
[ARM][AArch64] autogenerate header file for TargetParser from Target tablegen files (#88378)
Introduce a mechanism to share data between the ARM and AArch64 backends and
TargetParser, to reduce duplication of code. This is similar to the current
RISC-V implementation.
The target tablegen file (in this case `ARM.td` or `AArch64.td`) is
processed during building of `TargetParser` to generate the following
files in the build tree:
- `build/include/llvm/TargetParser/ARMTargetParserDef.inc`
- `build/include/llvm/TargetParser/AArch64TargetParserDef.inc`
For now, the use of these generated files is limited to files _outside_
of `TargetParser`. The main reason for this is that the modifications to
`TargetParser` will require additional data added to the tablegen files,
which I want to split into separate PRs.
Commit: 1161ecf5b669dcebaa840f981079872bfcf68ecd
https://github.com/llvm/llvm-project/commit/1161ecf5b669dcebaa840f981079872bfcf68ecd
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M clang/lib/Serialization/ASTWriter.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/HostAssociations.cpp
M flang/test/Lower/HLFIR/internal-procedures.f90
M libcxx/include/__utility/no_destroy.h
A libcxx/test/libcxx/utilities/no_destroy.pass.cpp
M lldb/docs/conf.py
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
M llvm/include/llvm/ExecutionEngine/Orc/TaskDispatch.h
M llvm/include/llvm/TargetParser/CMakeLists.txt
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/TaskDispatch.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/ARMSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/TargetParser/CMakeLists.txt
M llvm/test/Analysis/ValueTracking/known-non-zero.ll
M llvm/test/TableGen/ContextlessPredicates.td
M llvm/test/TableGen/DefaultOpsGlobalISel.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/builtins/match-table-eraseroot.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/builtins/match-table-replacerreg.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-imms.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-intrinsics.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-miflags.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-operand-types.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-patfrag-root.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-permutations.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-temp-defs.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-typeof.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table.td
M llvm/test/TableGen/GlobalISelEmitter-atomic_store.td
M llvm/test/TableGen/GlobalISelEmitter-immAllZeroOne.td
M llvm/test/TableGen/GlobalISelEmitter-immarg-literal-pattern.td
M llvm/test/TableGen/GlobalISelEmitter-input-discard.td
M llvm/test/TableGen/GlobalISelEmitter-multiple-output-discard.td
M llvm/test/TableGen/GlobalISelEmitter-multiple-output.td
M llvm/test/TableGen/GlobalISelEmitter-nested-subregs.td
M llvm/test/TableGen/GlobalISelEmitter-notype-output-pattern.td
M llvm/test/TableGen/GlobalISelEmitter-output-discard.td
M llvm/test/TableGen/GlobalISelEmitter-zero-reg.td
M llvm/test/TableGen/GlobalISelEmitter.td
M llvm/test/TableGen/GlobalISelEmitterCustomPredicate.td
M llvm/test/TableGen/GlobalISelEmitterFlags.td
M llvm/test/TableGen/GlobalISelEmitterHwModes.td
M llvm/test/TableGen/GlobalISelEmitterMatchTableOptimizer.td
M llvm/test/TableGen/GlobalISelEmitterMatchTableOptimizerSameOperand-invalid.td
M llvm/test/TableGen/GlobalISelEmitterMatchTableOptimizerSameOperand.td
M llvm/test/TableGen/GlobalISelEmitterOverloadedPtr.td
M llvm/test/TableGen/GlobalISelEmitterRegSequence.td
M llvm/test/TableGen/GlobalISelEmitterSubreg.td
M llvm/test/TableGen/GlobalISelEmitterVariadic.td
M llvm/test/TableGen/HasNoUse.td
M llvm/test/TableGen/address-space-patfrags.td
M llvm/test/TableGen/gisel-physreg-input.td
M llvm/test/TableGen/immarg-predicated.td
M llvm/test/TableGen/immarg.td
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp
M llvm/unittests/ExecutionEngine/Orc/OrcTestCommon.cpp
M llvm/unittests/ExecutionEngine/Orc/OrcTestCommon.h
M llvm/unittests/ExecutionEngine/Orc/TaskDispatchTest.cpp
A llvm/utils/TableGen/ARMTargetDefEmitter.cpp
M llvm/utils/TableGen/CMakeLists.txt
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
M llvm/utils/gn/secondary/llvm/lib/IR/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/IR/BUILD.gn
Log Message:
-----------
test
Created using spr 1.3.4
Compare: https://github.com/llvm/llvm-project/compare/70045e8cd90e...1161ecf5b669
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