[all-commits] [llvm/llvm-project] a45eb6: AtomicExpand: Fix dropping a syncscope when bitcas...
Necip Fazil Yildiran via All-commits
all-commits at lists.llvm.org
Wed Apr 24 11:17:07 PDT 2024
Branch: refs/heads/users/Prabhuk/sprcallgraphsection-add-call-graph-section-options-and-documentation
Home: https://github.com/llvm/llvm-project
Commit: a45eb628779562fac72366f594fbcdc5607b4f8d
https://github.com/llvm/llvm-project/commit/a45eb628779562fac72366f594fbcdc5607b4f8d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i16.ll
Log Message:
-----------
AtomicExpand: Fix dropping a syncscope when bitcasting atomicrmw
Commit: fd9273593390c4e5004bba27eeeea60e44175dcf
https://github.com/llvm/llvm-project/commit/fd9273593390c4e5004bba27eeeea60e44175dcf
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M mlir/docs/Tutorials/UnderstandingTheIRStructure.md
Log Message:
-----------
[MLIR][Doc] Fix NamedAttribute API in code sample (NFC)
Commit: 744d469500d209b7bf548d81f607d61a156db2e6
https://github.com/llvm/llvm-project/commit/744d469500d209b7bf548d81f607d61a156db2e6
Author: Thurston Dang <thurston at google.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/test/Instrumentation/HWAddressSanitizer/basic.ll
M llvm/test/Instrumentation/HWAddressSanitizer/fixed-shadow.ll
M llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll
Log Message:
-----------
[hwasan] Optimize outlined memaccess for fixed shadow on Aarch64 (#88544)
The HWASan transform currently always uses x20 to pass the shadow base to hwasan_check_memaccess_shortgranules, even if the shadow base is a constant known at compile time (e.g., for Fuchsia, KHWASan, or via -hwasan-mapping-offset). This patch uses the fixed shadow variant of the hwasan_check_memaccess_shortgranules intrinsic (introduced in https://github.com/llvm/llvm-project/commit/365bddf634993d5ea357e9715d8aacd7ee40c4b5), allowing the shadow base to be materialized inside the memaccess callee.
We currently only support this optimization for AArch64; it is a no-op on other platforms due to lack of support for lowering the intrinsic.
Note: when a binary is instrumented with -hwasan-mapping-offset, it is necessary to specify HWASAN_OPTIONS=fixed_shadow_base=... (see ea991a11b2a3d2bfa545adbefb71cd17e8970a43) at runtime to ensure the shadow is mapped appropriately.
Commit: 69a3976e427d95eca3670cac963088c76612c9db
https://github.com/llvm/llvm-project/commit/69a3976e427d95eca3670cac963088c76612c9db
Author: Scott Linder <Scott.Linder at amd.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
Log Message:
-----------
[AMDGPU][NFC] Fix typo in HeterogeneousDWARF doc
Commit: ff57f40673f0db2c1a867e5697d5407bc9f39a5e
https://github.com/llvm/llvm-project/commit/ff57f40673f0db2c1a867e5697d5407bc9f39a5e
Author: Oleksandr "Alex" Zinenko <zinenko at google.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M mlir/python/mlir/dialects/transform/interpreter/__init__.py
M mlir/test/python/dialects/transform_interpreter.py
Log Message:
-----------
[mlir][py] fix option passing in transform interpreter (#89922)
There was a typo in dispatch trampoline.
Commit: b8f3024a315074e0f880542c33cb89681eebc5a3
https://github.com/llvm/llvm-project/commit/b8f3024a315074e0f880542c33cb89681eebc5a3
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2024-04-25 (Thu, 25 Apr 2024)
Changed paths:
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector2.c
M clang/test/CodeGen/builtins-wasm.c
M clang/test/CodeGen/ms-intrinsics-other.c
M clang/test/CodeGen/ms-intrinsics.c
M clang/test/CodeGenOpenCL/builtins-generic-amdgcn.cl
M clang/test/Headers/wasm.c
M llvm/include/llvm/IR/Attributes.h
M llvm/include/llvm/IR/InstrTypes.h
M llvm/lib/IR/Attributes.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/bit_ceil.ll
M llvm/test/Transforms/InstCombine/bit_floor.ll
M llvm/test/Transforms/InstCombine/cmp-intrinsic.ll
M llvm/test/Transforms/InstCombine/ctlz-cttz-bitreverse.ll
M llvm/test/Transforms/InstCombine/ctlz-cttz-shifts.ll
M llvm/test/Transforms/InstCombine/ctpop-bswap-bitreverse.ll
M llvm/test/Transforms/InstCombine/ctpop-cttz.ll
M llvm/test/Transforms/InstCombine/ctpop-pow2.ll
M llvm/test/Transforms/InstCombine/ctpop.ll
M llvm/test/Transforms/InstCombine/cttz-abs.ll
M llvm/test/Transforms/InstCombine/cttz-negative.ll
M llvm/test/Transforms/InstCombine/cttz.ll
M llvm/test/Transforms/InstCombine/ffs-1.ll
M llvm/test/Transforms/InstCombine/ffs-i16.ll
M llvm/test/Transforms/InstCombine/fls-i16.ll
M llvm/test/Transforms/InstCombine/fls.ll
M llvm/test/Transforms/InstCombine/fold-ctpop-of-not.ll
M llvm/test/Transforms/InstCombine/fold-log2-ceil-idiom.ll
M llvm/test/Transforms/InstCombine/freeze-integer-intrinsics.ll
M llvm/test/Transforms/InstCombine/freeze.ll
M llvm/test/Transforms/InstCombine/icmp-ne-pow2.ll
M llvm/test/Transforms/InstCombine/intrinsic-select.ll
M llvm/test/Transforms/InstCombine/intrinsics.ll
M llvm/test/Transforms/InstCombine/ispow2.ll
M llvm/test/Transforms/InstCombine/known-non-zero.ll
M llvm/test/Transforms/InstCombine/known-phi-recurse.ll
M llvm/test/Transforms/InstCombine/minmax-fold.ll
M llvm/test/Transforms/InstCombine/reduction-add-sext-zext-i1.ll
M llvm/test/Transforms/InstCombine/reduction-xor-sext-zext-i1.ll
M llvm/test/Transforms/InstCombine/select-cmp-cttz-ctlz.ll
M llvm/test/Transforms/InstCombine/select-ctlz-to-cttz.ll
M llvm/test/Transforms/InstCombine/select.ll
M llvm/test/Transforms/InstCombine/sext.ll
M llvm/test/Transforms/InstCombine/shift-cttz-ctlz.ll
M llvm/test/Transforms/InstCombine/shift.ll
M llvm/test/Transforms/InstCombine/sub-xor.ll
M llvm/test/Transforms/InstCombine/xor.ll
M llvm/test/Transforms/InstCombine/zext-ctlz-trunc-to-ctlz-add.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/PhaseOrdering/X86/loop-idiom-vs-indvars.ll
M llvm/test/Transforms/PhaseOrdering/lower-table-based-cttz.ll
Log Message:
-----------
[InstCombine] Swap out range metadata to range attribute for cttz/ctlz/ctpop (#88776)
Since all optimizations that use range metadata now also handle range attribute, this patch replaces writes of
range metadata for call instructions to range attributes.
Commit: 2e770edd8ce13f48402f1d93e5fb982d8a2ebe64
https://github.com/llvm/llvm-project/commit/2e770edd8ce13f48402f1d93e5fb982d8a2ebe64
Author: Sebastian Poeplau <poeplau at adacore.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/tools/c-index-test/c-index-test.c
M clang/tools/libclang/CXSourceLocation.cpp
M clang/unittests/libclang/LibclangTest.cpp
Log Message:
-----------
[libclang] Compute the right spelling location (#72400)
Locations inside macro expansions have different spelling/expansion
locations. Apply a FIXME to make the libclang function
clang_getSpellingLocation return the right spelling location, and adapt
the testsuite driver code to use the file location rather than the
spelling location to compute source ranges.
Co-authored-by: Matthieu Eyraud <eyraud at adacore.com>
Commit: 57f0284efc74dfad7a3ff20e2cf1f74a70a08824
https://github.com/llvm/llvm-project/commit/57f0284efc74dfad7a3ff20e2cf1f74a70a08824
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
[bazel] Mark linux LLDB plugin as linux only (#89961)
Otherwise if you bazel build //... on macOS this fails to build
Commit: 3c2e614acd76495fda74f945dddd8bb89ae0f41f
https://github.com/llvm/llvm-project/commit/3c2e614acd76495fda74f945dddd8bb89ae0f41f
Author: Troy Butler <118708570+Troy-Butler at users.noreply.github.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
Log Message:
-----------
[llvm][AArch64] Add missing default cases (#89930)
Addresses issue #89709.
Functions getAUTOpcodeForKey() and getPACOpcodeForKey() contain switch
statements without default cases. Resolved by adding a call to
llvm_unreachable() at the end of each function.
---------
Signed-off-by: Troy-Butler <squintik at outlook.com>
Co-authored-by: Troy-Butler <squintik at outlook.com>
Commit: 0e57c3eb0dbfe2929ab899b2409807402acfc38e
https://github.com/llvm/llvm-project/commit/0e57c3eb0dbfe2929ab899b2409807402acfc38e
Author: Andy Kaylor <andrew.kaylor at intel.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M clang/test/Driver/fast-math.c
Log Message:
-----------
Clean up the checks in the fast-math driver test
This change replaces most of the cc1 option checks in the driver test for fast-math option handling. These changes rely on the assumption that the order in which the driver emits floating-point options is stable.
The changes also rely on the assumption that the order of prefixes listed on the FileCheck command line is unimportant and that all prefixed checks will be combined and checked as if they were a single prefix. At the time of the change, that worked.
Commit: c253c3cb539a0d630be28ba3d1c75348d7deefa4
https://github.com/llvm/llvm-project/commit/c253c3cb539a0d630be28ba3d1c75348d7deefa4
Author: Necip Fazil Yildiran <necip at google.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector2.c
M clang/test/CodeGen/builtins-wasm.c
M clang/test/CodeGen/ms-intrinsics-other.c
M clang/test/CodeGen/ms-intrinsics.c
M clang/test/CodeGenOpenCL/builtins-generic-amdgcn.cl
M clang/test/Driver/fast-math.c
M clang/test/Headers/wasm.c
M clang/tools/c-index-test/c-index-test.c
M clang/tools/libclang/CXSourceLocation.cpp
M clang/unittests/libclang/LibclangTest.cpp
M llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
M llvm/include/llvm/IR/Attributes.h
M llvm/include/llvm/IR/InstrTypes.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/IR/Attributes.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/Instrumentation/HWAddressSanitizer/basic.ll
M llvm/test/Instrumentation/HWAddressSanitizer/fixed-shadow.ll
M llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i16.ll
M llvm/test/Transforms/InstCombine/bit_ceil.ll
M llvm/test/Transforms/InstCombine/bit_floor.ll
M llvm/test/Transforms/InstCombine/cmp-intrinsic.ll
M llvm/test/Transforms/InstCombine/ctlz-cttz-bitreverse.ll
M llvm/test/Transforms/InstCombine/ctlz-cttz-shifts.ll
M llvm/test/Transforms/InstCombine/ctpop-bswap-bitreverse.ll
M llvm/test/Transforms/InstCombine/ctpop-cttz.ll
M llvm/test/Transforms/InstCombine/ctpop-pow2.ll
M llvm/test/Transforms/InstCombine/ctpop.ll
M llvm/test/Transforms/InstCombine/cttz-abs.ll
M llvm/test/Transforms/InstCombine/cttz-negative.ll
M llvm/test/Transforms/InstCombine/cttz.ll
M llvm/test/Transforms/InstCombine/ffs-1.ll
M llvm/test/Transforms/InstCombine/ffs-i16.ll
M llvm/test/Transforms/InstCombine/fls-i16.ll
M llvm/test/Transforms/InstCombine/fls.ll
M llvm/test/Transforms/InstCombine/fold-ctpop-of-not.ll
M llvm/test/Transforms/InstCombine/fold-log2-ceil-idiom.ll
M llvm/test/Transforms/InstCombine/freeze-integer-intrinsics.ll
M llvm/test/Transforms/InstCombine/freeze.ll
M llvm/test/Transforms/InstCombine/icmp-ne-pow2.ll
M llvm/test/Transforms/InstCombine/intrinsic-select.ll
M llvm/test/Transforms/InstCombine/intrinsics.ll
M llvm/test/Transforms/InstCombine/ispow2.ll
M llvm/test/Transforms/InstCombine/known-non-zero.ll
M llvm/test/Transforms/InstCombine/known-phi-recurse.ll
M llvm/test/Transforms/InstCombine/minmax-fold.ll
M llvm/test/Transforms/InstCombine/reduction-add-sext-zext-i1.ll
M llvm/test/Transforms/InstCombine/reduction-xor-sext-zext-i1.ll
M llvm/test/Transforms/InstCombine/select-cmp-cttz-ctlz.ll
M llvm/test/Transforms/InstCombine/select-ctlz-to-cttz.ll
M llvm/test/Transforms/InstCombine/select.ll
M llvm/test/Transforms/InstCombine/sext.ll
M llvm/test/Transforms/InstCombine/shift-cttz-ctlz.ll
M llvm/test/Transforms/InstCombine/shift.ll
M llvm/test/Transforms/InstCombine/sub-xor.ll
M llvm/test/Transforms/InstCombine/xor.ll
M llvm/test/Transforms/InstCombine/zext-ctlz-trunc-to-ctlz-add.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/PhaseOrdering/X86/loop-idiom-vs-indvars.ll
M llvm/test/Transforms/PhaseOrdering/lower-table-based-cttz.ll
M mlir/docs/Tutorials/UnderstandingTheIRStructure.md
M mlir/python/mlir/dialects/transform/interpreter/__init__.py
M mlir/test/python/dialects/transform_interpreter.py
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.6-beta.1
[skip ci]
Commit: dcd3243ea2e829a051bf30f8c246e83535844583
https://github.com/llvm/llvm-project/commit/dcd3243ea2e829a051bf30f8c246e83535844583
Author: Necip Fazil Yildiran <necip at google.com>
Date: 2024-04-24 (Wed, 24 Apr 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector2.c
M clang/test/CodeGen/builtins-wasm.c
M clang/test/CodeGen/ms-intrinsics-other.c
M clang/test/CodeGen/ms-intrinsics.c
M clang/test/CodeGenOpenCL/builtins-generic-amdgcn.cl
M clang/test/Driver/fast-math.c
M clang/test/Headers/wasm.c
M clang/tools/c-index-test/c-index-test.c
M clang/tools/libclang/CXSourceLocation.cpp
M clang/unittests/libclang/LibclangTest.cpp
M llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
M llvm/include/llvm/IR/Attributes.h
M llvm/include/llvm/IR/InstrTypes.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/IR/Attributes.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/Instrumentation/HWAddressSanitizer/basic.ll
M llvm/test/Instrumentation/HWAddressSanitizer/fixed-shadow.ll
M llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i16.ll
M llvm/test/Transforms/InstCombine/bit_ceil.ll
M llvm/test/Transforms/InstCombine/bit_floor.ll
M llvm/test/Transforms/InstCombine/cmp-intrinsic.ll
M llvm/test/Transforms/InstCombine/ctlz-cttz-bitreverse.ll
M llvm/test/Transforms/InstCombine/ctlz-cttz-shifts.ll
M llvm/test/Transforms/InstCombine/ctpop-bswap-bitreverse.ll
M llvm/test/Transforms/InstCombine/ctpop-cttz.ll
M llvm/test/Transforms/InstCombine/ctpop-pow2.ll
M llvm/test/Transforms/InstCombine/ctpop.ll
M llvm/test/Transforms/InstCombine/cttz-abs.ll
M llvm/test/Transforms/InstCombine/cttz-negative.ll
M llvm/test/Transforms/InstCombine/cttz.ll
M llvm/test/Transforms/InstCombine/ffs-1.ll
M llvm/test/Transforms/InstCombine/ffs-i16.ll
M llvm/test/Transforms/InstCombine/fls-i16.ll
M llvm/test/Transforms/InstCombine/fls.ll
M llvm/test/Transforms/InstCombine/fold-ctpop-of-not.ll
M llvm/test/Transforms/InstCombine/fold-log2-ceil-idiom.ll
M llvm/test/Transforms/InstCombine/freeze-integer-intrinsics.ll
M llvm/test/Transforms/InstCombine/freeze.ll
M llvm/test/Transforms/InstCombine/icmp-ne-pow2.ll
M llvm/test/Transforms/InstCombine/intrinsic-select.ll
M llvm/test/Transforms/InstCombine/intrinsics.ll
M llvm/test/Transforms/InstCombine/ispow2.ll
M llvm/test/Transforms/InstCombine/known-non-zero.ll
M llvm/test/Transforms/InstCombine/known-phi-recurse.ll
M llvm/test/Transforms/InstCombine/minmax-fold.ll
M llvm/test/Transforms/InstCombine/reduction-add-sext-zext-i1.ll
M llvm/test/Transforms/InstCombine/reduction-xor-sext-zext-i1.ll
M llvm/test/Transforms/InstCombine/select-cmp-cttz-ctlz.ll
M llvm/test/Transforms/InstCombine/select-ctlz-to-cttz.ll
M llvm/test/Transforms/InstCombine/select.ll
M llvm/test/Transforms/InstCombine/sext.ll
M llvm/test/Transforms/InstCombine/shift-cttz-ctlz.ll
M llvm/test/Transforms/InstCombine/shift.ll
M llvm/test/Transforms/InstCombine/sub-xor.ll
M llvm/test/Transforms/InstCombine/xor.ll
M llvm/test/Transforms/InstCombine/zext-ctlz-trunc-to-ctlz-add.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/PhaseOrdering/X86/loop-idiom-vs-indvars.ll
M llvm/test/Transforms/PhaseOrdering/lower-table-based-cttz.ll
M mlir/docs/Tutorials/UnderstandingTheIRStructure.md
M mlir/python/mlir/dialects/transform/interpreter/__init__.py
M mlir/test/python/dialects/transform_interpreter.py
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
Rebased on top of main
Created using spr 1.3.6-beta.1
Compare: https://github.com/llvm/llvm-project/compare/daf306aceea7...dcd3243ea2e8
To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications
More information about the All-commits
mailing list