[all-commits] [llvm/llvm-project] 8350d9: [RISCV] Sync RISCVFeatures.td implies list with RI...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8350d9c23d76fb95f42674a1563cbe8c32582dd5
      https://github.com/llvm/llvm-project/commit/8350d9c23d76fb95f42674a1563cbe8c32582dd5
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-04-24 (Wed, 24 Apr 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/test/MC/RISCV/rv32dc-valid.s
    M llvm/test/MC/RISCV/rv32fc-valid.s
    M llvm/test/MC/RISCV/rv64dc-valid.s

  Log Message:
  -----------
  [RISCV] Sync RISCVFeatures.td implies list with RISCVISAInfo.cpp.

This makes Zcf imply F and Zcd imply D in RISCVFeatures.td. They
were already implied in RISCISAInfo.cpp.

Some test RUN lines had to be removed because they were testing
that Zcf without F or Zcd without D would reject some instructions.



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