[all-commits] [llvm/llvm-project] d3f6a8: [AArch64] Unify lowering logic for fixed-length ve...

[Sander de Smalen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d3f6a88a1fb36f94c71940514e576821c6cc3ade
      https://github.com/llvm/llvm-project/commit/d3f6a88a1fb36f94c71940514e576821c6cc3ade
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2024-04-24 (Wed, 24 Apr 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-bitcast.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-extract-vector-elt.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-compares.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-fma.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-minmax.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-reduce.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-rounding.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-select.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-to-int.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-vselect.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-ld2-alloca.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-loads.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-optimize-ptrue.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-subvector.ll

  Log Message:
  -----------
  [AArch64] Unify lowering logic for fixed-length vectors. (#89393)

In preparation of decoupling codegen for SME from SVE, this patch does a
bit of cleanup to unify the logic around calling
'addTypeForFixedLengthSVE'.

We only want to call this function when:
* We have access to both SVE and NEON, but we prefer to use SVE.
* We have access to SVE, but there is no access to NEON.

Inside 'addTypeForFixedLengthSVE', we normally use Custom lowering for
all operations so they can be converted to/from scalable vector
operations.

However, there are some exceptions:

* For 64/128bit vector loads/stores we prefer the AdvSIMD LDR/STR
D/Q-reg instructions, since these are available in Streaming-SVE mode.

* For some operations like gather/scatter, we can only use SVE if the
full set of SVE instructions is available (as opposed to the
streaming[-compatible] subset). Otherwise, these operations need to
expand (scalarise)



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